I'm preaty sure that both work. However, this cell is usualy symetric, so solution 2 ("and") seems to me more "normal" . Moreover, BL and BL_ are kind of differential line; so it is better to have the same load for all : W5 = W6 and L5 = L6.

Dear Saurabh Sinha ,

I would second Saurabh Sinha that condition 2 is the right one since the bit and bit bar alternate between high and low. It is required that the drivers have high capacitance and low on resistance. This will prevent the the change of sate of the memory cell during the reading

Best wishes