Now a days there are so many institutes teach student VHDL for the name of VLSI please discuss
Present days, so many universities teach VHDL for the name of VLSI.
Goli sir,
Actually VHDL is a part of semi custom design which comes under vlsi design but learning only VHDL is not VLSI because according to me without knowledge of full custom design one cant be a VLSI professional.
Dear sir
VHDL is Hardware description language. It is not VLSI. In VLSI, we usually teach HDL (VHDL/Verilog/System Verilog etc.) to model digital logic circuits and used in electronic design automation. VLSI includes circuit level modeling, device level modeling, reliability, VLSI testing as well as FPGA Prototyping of digital/analog/mixed signals using different tools eg CADENCE tools, tanner tools, T-CAD etc.
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