I discussed this effect upto some extent in my manuscript I think, It must be taken care for every current mode device
Not sure what you are asking exactly. Possibly, transconductance bimodal effect.
Resistance R = V / I
Conductance is the reciprocal of resistance, or I / V.
Transconductance is a term used for active components, tubes, bipolar transistors, or field effect transistors.
gm = dI (plate or collector or drain current) / dV (grid or base or gate voltage)
This has a direct effect on the gain of this device. If a small change to the grid/base/gate voltage creates a comparatively larger change in the plate/collector/drain current, then that device has higher gain that the device in which less of an increased current is experienced.
Or perhaps you are asking about transconductance bimodal effect? This is the strange behavior of gm, in cases where the device is operating below the base or gate threshold voltage. So, when the device is expected to be switched off, you might notice bumps in collector or drain current, even though you are expecting essentially zero current. See attached article.
Thanks Albert ,
This is exact i am asking can you please describe what is the significance of the word bimodal here
Hi Pawan,
I think that "bimodal" simply means, "two modes" of operation. This text, from the EDN article I attached previously, explains this effect:
------Quoting article---------
The threshold voltage VT of a FET is a function of the doping of the back-gate: where VSB is the source-to-body substrate bias, 2ΦF is the surface potential, and VT0 is threshold voltage for zero substrate bias. Due to a lower effective doping (NA) at the edges (because dopants seep into STI oxide), the "edge" transistor (shown in red in Figure 2) possesses a lower threshold voltage than the "core" transistor shown in blue in Figure 2). Traversing along the width, as we go towards the center of the FET, the doping NA is more uniform, hence the core FET remains unsullied by any edge effects.
Thus, a single FET can be imagined as being composed of two different types of FETs working in parallel. The lower VT of the edge FET makes it conduct sooner, which increases the drain current leakages in sub-threshold and weak-inversion, thereby showing the aberrant double humps in ID and kinks in gm as their electrical manifestation.
thanks Albert
stay in touch
can you connect with me via email at [email protected]
looking forward
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