In the PW Inverters, switching produces voltage spikes due to charging and discharging of the parasitic capacitances. Qualitative analysis will be helpful, is there mathematical model or formula which can relate the noise produced with the following:

1. Switching frequency

2. Rise and fall dV/dt, di/dt

3. DC bus voltage

4. Switching techniques

5. o/p load current

6. Modulation Index.

How are these related to the noise, how do they effect it?