Hello,
I am Aalok Bhatt working as Senior Engineer with Hitachi Hi-Rel Power Electronics Pvt. Ltd. (A Hitachi Group Company) in R&D department. My current focus is in the area of Solar Inverters design and development.
I referred the IEEE paper titled as, “Analytical Expression for RMS DC Link Capacitor Current in a Three-Level Inverter” (Attachment-1:IEEE_Prof_Narayanan.pdf). I am interested in finding the DC link capacitor current for our application to size the capacitance correctly.
However, in our inverter application (for e.g. 500 kW rating), one IGBT stack represents one phase. The stack consists of 4 identical semikron IGBTs in parallel (Alternatively 6 FUJI IGBTs in parallel) to get desired current output of a phase. Therefore 3 such stacks are installed to construct R-Y-B phases for 500 kW inverter. In such configuration, the analytical expression for RMS DC link Capacitor Current will be different than that of presented in your paper.
I have attempted an analytical calculation of this current which is attached as PDF (Attachment-2: Calculation_Capacitor_RMSCurrent.pdf). Furthermore, I have also attached one excel sheet (Attachment 3: DC Link Capacitor Sizing.xls) which gives the value of RMS DC link capacitor current calculated from my expression for our configuration as well as for the configuration presented in the paper for 500 kW inverter.
I will be highly obliged to you if you can cross check my analytical expression for its correctness and give me the feedback. I am currently getting very high value of RMS capacitor current. Current should be around 130 A and it comes around 700 A or so. I am lacking somewhere and I need your support to find out the problem.
I will be also available for the Tele. Conference or WebEx or Skype meeting as per your convenience if need arises.
Thanking you.
Yours Sincerely,
Aalok
Dear Aalok,
may be these papers can help you:
https://www.kalbeck.com/asset/630/Whitepaper%20SalconeBond.pdf
http://cpdee.ufmg.br/~paulos/sei_arquivos/analytic%20calculation%20of%20the%20dc%20link.pdf
Dear Aalok Bhatt;
I hope that all my suggested files are helpful for you.
Dear Mohamed,
Thank you very much for your answers to my posted question. Fortunately, I have found a very insightful IEEE paper of an Indian Professor, Prof. Narayanan. I am attaching that paper herewith. He has calculated, simulated and experimented 3-L 3-Phase inverter for capacitor RMS ripple current which co-insides fairly with my configuration in MATLAB as well. However, I am getting one problem therein which is described here.
Here, I am simulating 833 kW 3-L 3-Phase inverter in Simulink. My analytical calculation says that, my capacitor RMS current should be 550 A with following inputs.
Rated kVA = 833
Rated AC Voltage Vout [V] = 560
"Expected DC Link Voltage Vdc [V] = 1250
Rated Current INrms [A] = 858.8085254
COSφ = 1
Modulation Index M = 0.731580937
Switching Frequency Fsw [Hz] = 2000
Desired ripple voltage [%] = 1
DC Voltage Ripple [V] =12.5
Now, the expected Capacitor RMS current waveform is shown at page 5 of attached PDF. I get the same waveform in my 833 kVA inverter simulation with expected value as per my calculation. The problem is as under:
If you see my attached Capacitor RMS current waveform then, the peaks of current looks like inductor discharge where as in IEEE paper (Page-5) they have the peaks of capacitor RMS current (Icap) as uniform value (like a square wave peaks).
All other simulation waveforms are perfect.
Do you know the reason ? Has it something to do with simulation configuration parameters or something?
Thank you
Regards
Aalok
hi i worked on this. After finding the worst case rms current at p.f =1, and M.I=0.6 .
W.K.T
i_rms = c* (dv/dt)
i_rms current in capacitor . (Use (25) formula in prof narayanan paper).
i_rms at (M.I 0,6 and P.F =1)
dv = voltage ripple= e*U_dc (e= ripple percent in your case 1%=0.01)
dt = switching time/2 (because we need to calulate only half timeperiod ).
so
C =2*I_cap_rms/(0.01*U_dc* f_sw)
I simplified for you.
Below document will give complete design. It is similar to 2 or 3 level inverter.
One more important consideration is we need to consider another worst case i.e when inverter is operating in single phase. the capacitor should be large to accomdate this scenario.
I worked on this UPS System, and i worked fine.
Thank you for Sharing Srujan. By the way I figured out the problem. It was because, I did not include actual bus bar inductances of the system . I did it and simulated again which has given me satisfactory results.
Regards
Aalok
Hi Srujon,
Shouldn't the 2 in your given equation be on the denominator instead of being on the numerator?
The capcitor of the DC link is related to the Bus voltage and it is usually chosen larger as possible when the DC bus is large.you can use several capacitors in series and in parallel using high resistances to balance the voltages at the terminal of each capacitor
Hi
I would like to use this paper ( “Analytical Expression for RMS DC Link Capacitor Current in a Three-Level Inverter” ) to calculate DC-link current in the inverter used with the STATCOM application but I don't know what IN means here, in the paper it says it is referring to the output current, but for what phase?
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