If you mean by the resolution of the comparator the smallest difference between the input and the reference voltage, then you can find it out by making the following simulation test:
-Apply a fixed DC reference voltage Vr on one of the inputs of the comparator
- Then apply a variable DC input voltage Vi on the other input starting with a value equals the reference voltage,
-Slowly increment the input voltage Vi by small values till the output of the comparator changes state, that is goes from low to high or high to low. Assume that this voltage is Vi*.
- The difference delta V= Vi*- Vr= The resolution.
You can substitute Vi by a slow ramp voltage passing through Vi* and observing the change of the output voltage.
In summary, you use the same procedure as in the real experiments. Also, you measure or simulate as you define.
thank you for the reply.. i am doing the same thing. For example In DC Simulation one input is fixed 0.8V and another is varies from 0 to 1.8 with the step size 300uV. So by changing step size gain is also changing hence the resolution. So i am not able to to fix the step size. You define "The difference delta V= Vi*- Vr= The resolution" i am not getting your point please brief me more.
- I wonder why you use such large step size, your resolution may be much smaller than this step size. Let us make some estimations! assume the gain of your comparator is 100000 and the the power supply voltage VDD is 5V then, delta V= 50 microvolt., which is much smaller than the your step size. I would propose to make it as small as few micrvolts may be up to 10 uV.
- The solution is to apply Vr on the reference terminal and apply a voltage source between the input node and the reference node acting directly as The difference voltage between Vi and Vr. Then increment this voltage in very small steps till the comparator changes state.
- You can substitute the incremented dc voltage source by a very slow ramp voltage source and display the output voltage as a function of the input voltage.
please, the important thing is that the step size must be much smaller than the resolution which estimated to be VDD/ the differential gain.Then you easily fix the point of the resolution.
what you said i have done accordingly. one input is fixed and another input is varying with step size 10uV, VDD=1.8 and i want resolution around 300uV so gain required is 6000. Now the value in DC analysis is set and screen shot is attached please refer. When simulation is done then the output of comparator(Preamplifier+static latch+self differential output buffer) goes from 0 to 1.8 then i have taken its derivative which gives around 175000 gain.
Now my question is as i m changing step size in dc analysis gain is also changing. Means numerical value is same in all cases but decimal point is shifting i.e 175 or 1.75 or 17.5 according to step size. The thing is if we take derivative of the output (buffer output that goes from 0 to VDD) magnitude will always remain same but exponential power will going to change. gain is differntial of output / differential of input and differential of input changing then gain is obviously changing. Sir i know u tried alot to make me understand but still there is some confusion.
Does your comparator circuit include internal hysteresis? If you have positive feedback in the circuit, the method of finding the comparator resolution based on output voltage change and gain will break down.
What is the value of your reference voltage? is it 0.79V. if so,Then from your differential output, the turn over point is o8V. Then the resolution of your comparator is 0.8- 0.79= .01 V. Since you have a latch in the circuit, it is nonlinear which means its gain varies with the input stimuli. The highest small signal gain is normally greater than the large signal gain. However the definition of the comparator resolution remains the same and consequently measured in the same way. The gain variations are apparent at your output Y1(E3). physically, In the transition regions of changing state e.g. from low to high as in your case the transistors change the state of conduction from on to off or from to off passing through their active conduction where they act as an effective amplifiers.
THEN THE BETTER SOLUTION TO MEASURE THE RESOLUTION IS as i suggested before:
- The solution is to apply Vr on the reference terminal and apply a voltage source between the input node and the reference node acting directly as The difference voltage between Vi and Vr. Then increment this voltage in very small steps till the comparator changes state.
- You can substitute the incremented dc voltage source by a very slow ramp voltage source and display the output voltage as a function of the input voltage.
Thank you for the reply sir. I am totally agree with your point. As step size decreases gain is increses and it doesnt converge to constant value. Please see tabulated results.
S.No. Step Size in dc analysis offset voltage(V) gain
1 1e-2 4.46e-3 1.8e2
2 1e-3 4.4e-4 1.8e3
3 1e-4 4.44e-5 1.8e4
4 1e-5 4.4e-6 1.8e5
5 1e-6 4.4e-7 1.8e6
6 1e-7 4.4e-8 1.8e7
VDD=1.8
VSS=GND
One input is Vref=0.8
Another input is varrying and cross Vref at 0.8V.
Functioning of comparator is correct. I really dont understand where is the problem. Please suggest me solution of this problem apart from that you already have stated.
I am working on the same project. I am trying to masure the resolution for push pull comparator. My vref = 0v ,Vdd = 1V , Vss = -1V
I am varying my other input terminal from -0.5 to 0.5 V but I am getting change of state for every graph I plotted for this range. I am attaching my graph and my test bench. Can anyone help me with this problem. And explain me how to measure the resolution in my case.