You have to set the DC operating point of the your MOS device. Then you apply on it a small ac voltage signal with the required frequency then you calculate the current. I think the error in what you did is that you input a large AC input signal.
You have to reduce the level of the input signal for small signal performance may be around 10 mv. You can make also a cosimulation DC+AC with the same concepts.
- after the simulation is finished, you have to open the calculator
- Please select the OP and click on the device that you want to know its electrical parameters.
- And click on print.
Ps.: In virtuoso, there are plenty of ways to do the same thing. For instance, you could either add this parameter as output in the ADE or use a balloon to print its values in the schematic canvas. I hope, I have helped!
I'm considering you're trying to characterize a transistor. There are two kinds of DC simulation: DC operating point analysis and DC sweep analysis. A normal DC sweep analysis will give correct drain current results, but not OP, as the OP consider only the first DC condition, not the DC sweep.
First, you do the steps P. Toledo suggested, with the calculator, but export the expression to the output setup in ADE, so you won't need to open the calculator each time you run the simulation. Then, you run a parametric simulation (see Tools menu) instead of a DC sweep simulation only. This way, the simulator will run many different OP analysis instead of a single DC sweep.
The VGS voltage must be a variable in the ADE window. Otherwise, you won't be able to run the parametric simulation. Some people configure the DC sweep simulation to vary the voltage source DC component directly. This won't work with parametric analysis.
the procedure you are following is substantially correct (apply an ac gate voltage at frequency omega - the amplitude does not matter, since the analysis is performed in linearity, so 1V is fine - get the gate current from the simulation and then evaluate Cgg= Ig/(2*pi*f*1V), - but I guess the problem is in how you are biasing the device. Cgg is defined as the capacitance between the gate terminal and ground when the drain and bulk terminals are AC grounded (i.e. connected to ground via a short or a dc voltage source). I understand you want to get the results at different VGS bias, but what about VDS and VBS? Please note that if these DC voltages are not properly fixed, the result could be completely different than expected.
Conceptually speaking, you can carry out an AC analysis and calculate Cgg from the definition of impedance, that is, 1/wCgg = Vg/Ig. As Paolo Stefano Crovetti said, it is equivalent to have Cgg = Ig/(2*pi*f*1V). Therefore, you may measure current Ig at frequency f and use both values in this expression. The AC value of 1 V is not a problem, it is even convenient, as for an AC analysis the electrical simulators use linear models for the active devices and, hence, it makes calculations simpler while not leading the system to saturation.
Procedurally, it is more straightforward to obtain the value from Cadence options. One of these options is to use the option "Results>Print>DC Operating Points" and selecting the device. The parameter Cgg is among them and it will be printed. It is also possible, as P. Toledo suggested, to use the Calculator and the option "op".
If what you want is to sweep the value of Cgg for different operating points, you can set a DC analysis, define a design variable for the DC value of the input DC source and then run a parametric analysis of this variable. The Calculator will allow you to plot the value of Cgg, this time versus the value of the variable used in the parametric analysis.