Hi, have you tried the CST software?

Ahmed,

You can solve any device either analytically or numerically. You have to follow the following steps:

- Knowing the electrical and electronic properties of the constituting materials.

such as the carrier concentration, the mobility, the diffusivity, the life time of carriers.

- Make a clear physical model of the device comprising its dimensions and  materials.

- Then make a mathematical model of the device by writing the equations governing the electrical performance of the device . This model is called the mathematical model.

It is based on the semiconductor equations.

The semiconductor equations are the poison equation, the current equations, and the continuity equations in addition to the Boltzman transport equations and the wave mechanical equations eg the schroedinger equation. 

- Then you have to define the boundary conditions by the voltage ar current applied on the device. 

-then you solve these differential system of equations either analytically or numerically.

- Analytical  solutions are normally approximate and simplified solutions to the the complicated transport problems.

- The differential equations are applicable for every elementary volume in the device.

-one of the main simplifications of the solution is to use the regional approximations.

- In you problem you have to start with approximate analytical solutions and then you can solve the equations by numerical techniques using Matlab for example

-you may also use one of the existing device simulators such as Silvaco to get a more exact solution.

- IN your device you may be interested in the characteristics of the graphine layer on a sio2 layer with two metallic electrodes at the ends of the graphine layer, this is the graphine transistor.

- You can find in the literature many papers on graphine and graphine transistor and you can start with. 

In addition to the valuable guidance of Mr. Abdelhalim, i'd like to add:

- take in your consideration that you have a unique value of I pass through the structure at certain V. The total V across the structure is the sum of the voltage developed across each part (i.e V=V1+V2+... )

- Write dawn the I-V equation describing each part of the structure, depending on the right transport mechanism in each part,

- To the best of my knowledge the equation describe such structure has no analytically solution. You should solve the equations by numerical techniques,

Plz read doi:10.1088/0268-1242/27/1/015006

Thank you all for these valuable info

For Prof. Abdelhalim:

- How can I know the proper mechanism of flow of current? I mean What determines that electrons will flow by diffusion or tunneling for example?

- I've measured I-V values for my device.

- The structure is just 3 layers, Gr - Pt - Si (no SiO2)

for Mr Elhadidy:

- " Write dawn the I-V equation describing each part of the structure, depending on the right transport mechanism in each part," 

My problem is how to know the right transport mechanism, any suggestions?

for Mr Kaustav Bhowmick: Is it free?

for Abdul Halim Manzur: can u suggest a tool for simulation of The following structure; 1 atomic layer of Graphene deposited on 40 nm Pt film which is grown on n-doped silicon wafer

- Each transport mechanism is dominating under certain conditions, e.g. carrier density, barrier height , Temperature,…. So I advise you for:

- read about these mechanisms

- From the shape of your I-V characteristic, from information about your structure, i.e carrier density, band bending, barrier height , T , and from what already published about similar structure… you can expect some mechanisms, try them and simulate I-V characteristic.

- If the simulated I-V has different shape than the measured one, i.e. linearity, rectifier, dependence of I and V, it will mean that you should change the selected transport mechanisms.

- And if the difference is just between the values, it means you have selected the right mechanisms, but with not suitable parameters, so you just will need to tune them;

Regards

Your question is very interesting. But i have a question which may be first answered before any further discussion, Where are the terminal contacts of the device or the electrodes. Is your device a two terminal device?. What due want to produce with your layer structures .Please display a drawing of your complete device including the terminal electrodes. Please display also the measured I-V characteristics. How high is your doping of the n- Si layer.

Dear Mr. Hadidy/Dr Zekry

Please have a look at this band structure, and send me feedback about my expectations for current mechanisms.

Pt-Si junction is fwd biased, electrons flow by thermoionic emission accross the depletion region.

Gr-Pt junction : electrons tunnel from Pt to Graphene.

Electrons tunnel from Pt to Graphene and passes through the reverse bias Schottky barrier (HOW?, please help me find an answer)

Please see the attached J-V

- I suppose from the I-V shape that the Schottky barrier between Pt-Si is playing the main role in your structure, I suppose that:

for FWD, The current is thermionic emission current over pt-si barrier, you can check it by plotting ln(i) vs V, (say for v>3 V) it should be straight line

for RVD, this barrier (pt-si) theoretically, is controlling the current, coz your structure has series layers, and it is height is higher than that between Pt-Ge.

Let us suppose that for now. so there is several reasons how the current can flow even you have RVD.

1- Plz plot ln(i) vs V^0.25, at V> say 10 V, if I will be straight line, it means that the image force is the mechanism responsible for the non-saturated reverse current.

Let us see this for now, then see the other possibilities

@Mr. Hadidy

I guess they are both straight lines (not prfect for fwd bias)

But I why did the image effect is not significant in case of Pt-Si junction (without graphene) fabricated by the same technology. Its Ccs are close to an Ideal rectifying schottcky

- It depends on a lot of parameters, i.e impurities density, thickness of the interfacial layer formed between PT- and Si,.... it should show ideal rectifier behavior, and if not, we should explain why is not, and there are several reasons, the simplest one is the effect of image force.,

- you should, if you planned, to simulate the I-V , and i think, you will find the reasons why straight lines is not ideal, and why these lines starting from / V / greater than 0V. if not, you may apply another effect than image force, e.g. tunneling through Pt-Si barrier, but this needs the [qh/4π[N/m∗εs ]1/2 to be of the order of kT /q  . i am not familiar with the parameters of your structure, however, i guess, this condition  requires a carrier concentration of N ≈ 1020 cm−3 at 300K. Please check it, and write dawn all these possibilities .

regards

Thanks for ur help, the Substrate is n doped 2x1015 /cm-3 , I think tunneling isn't the reason. 

- Can you please explain how do electrons in a fwd active mode BJT, (where the C-B junction is reversed) can cross that REV junction and are collected at the collector?

Can we say that a similar effect happens here?

BTW, I've simulated a npn BJT with same biasing as my structure in COMSOL and got similar I-V. check the attachments 

The p-base here was highly doped (1020/cm-3) 

- In your measured I-V, are both directions of current having the same scale? It is not clear in your graph. My previous explanations based on the reverse current was small in compared to forward one.

- If there are with comparable values, i guess you can think about: 2 diodes back to back and between them resistor (metallic layer) ,

- in case of the reversed C-B junction, the thermionic emission theory expects a league current, however, this current is very small and independent of V. in your case, your current is strong depends on V, and you should find the reasons why.

- if the simulation of npn results similar behavior of the measured I-V, so concentrate your efforts on how pt can behave line p-type region.

regards

- The idea of simulate  2 diodes back to back and between them resistor (metallic layer) will result symmetrical I-V , i.e the dependence of I and V will be the same in both direction, i think this is not your case, so try to explain how pt can behave line p-type region in your structure,

regards

I would like to thank Dr. Elhadidy for his discussion and his persistance trying to explain the The I-V characteristics obtained by Ahmed for his graphine- Pt - nSi diode.

This diode has three layers and two junctions. IT is apparent from his i-v characteristic that the more effective junction is Pt-Si junction where it shows a rectifying behavior as

usual for such junctions. The addition of Graphine  upsets the rectifying effect to a great extent  and the reverse current of the diode increases appreciable y. Since the addition of graphine leads to formation of a junction which have resistive behavior and can  be described a contact resistance, and hence can not change the reverse behavior of the diode , then you need more investigations to explore this effect.

In order to get more information about the the junctions of diode you have to measure the diode C-V. Or more general the mall signal impedance of the diode. before and after depositing the graphine layer. Also You can produce single Graphine - Si . You can use three electrodes instead of two electrodes such that you can access the two junctions, so , you have to attach an electrode to each layer.

Before starting the simulation you have to have to have sufficient information about the structure. Therefore more investigation is needed to explore the obtained behavior of your structure.

I have an expectation what is going on. You have pin holes in your Pt layer such that your graphine layer touches the silicon substrates. This leads to a partial short of your Pt- Si Schottky contact. Go, and see your platinum layer under microscope and be sure that it is completely continuous and and do not have any pinholes.

In the end you have two parallel PT-Si and Graphine-Si junctions, the Pt- Si is rectifying while the other is not. 

Please go on and inform us.

Wish you success.