I have written code for DEMUX and it is synthesizing it with LUTs only and it is not taking DEMUX into consideration while synthesis. why?
I am using xillinx zybo board and synthesis with vivado software.
In 7-series FPGAs (and Zynq on Zybo belongs to this cathegory) there are no Demultiplexers as building blocks. Basic building blocks are CLBs containing look-up-tables (LUT), Flip-Flops and some Multiplexers. These multiplexers can help to build wider multiplexers from LUTs.
Why isn't it so important to have DEMUXes physically on an FPGA or in digital integrated circuits at all?
Find the answer by inspecting a demultiplexers internal circuit and compare it to a decoder. What do these two circuits have in common? They both have a group of selection signals decoded by AND-gates. The only difference is, that a demux feeds an input line to each AND-gate. Each AND-gate points to a target logic.
During circuit synthesis the demux-decoding can take place in the target logic directly and also the input will go directly to each target. So, decision to take an Input or not is derived from select lines from the target logic itself, in fact in each target's LUT.
Hello, there are only mux blocks in FPGA architecture. The demux function is considered as a logical and combinatorial function. Then, it was synthesized with LUTs.
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