I am working on a project that involves designing a 2D vertically stacked PMOS on NMOS (CFET) device. This structure features a common gate terminal to control both the PMOS and NMOS channels, and it has four other terminals: Source_p and Drain_p for the PMOS, and Source_n and Drain_n for the NMOS. So far, I have successfully obtained the transfer characteristics of the NMOS and PMOS separately using sdevice in Sentaurus TCAD. However, I am struggling with how to simulate and obtain the Voltage Transfer Characteristics (VTC) of the CFET in inverter operation. Could you please help me with thecorrect approach and sdevice code for this simulation? I have given my sdevice code for reference.

Thank you very much