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Hi! I am designing a CMOS op-amp using TSMC's 180nm technology node. In that I have used a discrete capacitor and resistor for compensation. To improve accuracy of the design I need model card for...
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I want to design an Op-Amp using CMOS technology. For that I have been designing a differential amplifier as an input stage. I am stuck at transistor sizing. Recently I came across gm/id...
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I want to design a common source amplifier that can provide gain of -28dB at 180nm technology. Which topology will be the best for this purpose? How should I bias the transistor i.e what should be...
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In analog IC design we choose length of MOSFET as per technology file, but what for width? Means how I can decide the width of MOSFET for particular application?
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I have implemented 4-bit adders (Ripple carry and carry look ahead adder) on VHDL (Xilinx ISE design suit). How can I measure speed and power of both the designs for comparison?
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How can I compute gain of analog circuits like current mirrors and op-amps using CMOS?
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