Dear Hemant,

The major difference between the nMOS enhancement and depletion transistors is that the nMOS depletion transistor has a negative threshold voltage. So, you can get a depletion nMOS characteristics by only changing the threshold voltage of the enhancement nMOS VGST to - VGST. Try to make the modification and plot the I-V characteristics, you will find it depletion with negative gate voltage to cut off the transistor and control its current.

Best wishes

Abdelhalim abdelnaby Zekry Lahcen El Iysaouy Sir, thanks for reply. I am talking about cadence virtuoso tool, simply i just want to use Depletion MOS in NMOS depletion load inverter but in cadence virtuoso how can i do it?

We can not change Vth in cadence virtuoso tool,

i am not able to find Depletion mos in cadence virtuoso tool, can you help me?

Dear Hemant,

which i meant is to add a dot model card for the depletion NMOS and a symbol for it in the device model iiberary. As a proposal you can copy the model parameters of the enhancement nMOS with changing its threshold voltage as i hinted before.

For editing in the liberary you may refer to the link: https://community.cadence.com/cadence_technology_forums/f/custom-ic-design/37064/change-a-technology-library-into-a-design-library

You can ask your questions in this site also.

Best wishes

Lahcen El Iysaouy Sir, schematic side

Abdelhalim abdelnaby Zekry ....sir i wanted to know from where can we simulate depletion mode MOSFET's