Why the selection input of MUX in the conventional DFE has been chosen from the other clock path?

Vijender Kumar Sharma @Vijender-Kumar-Sharma

07 July 2022 0 6K Report

In the attached DFE figure, two 2-to-1 multiplexer are used and the selection input which is the decision for the previous data bit comes from another multiplexer output at the opposite clock path. Why the selection input has been chosen from the other clock path? The selection bits are highlighted in the figure.

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