The bottom-gate structure is favourable for printing processes, as the semiconductor is printed at last (assuming no encapsulation) avoiding solvent attack by other processing steps and possible doping.
The top gate structures are the most challenging in terms of process integration, as the semiconductor layer is deposited underneath. Therefore, the selection of materials and solvents is crucial. The subsequent deposition of the dielectric material can either damage or unintentionally dope the underlying organic semiconductor.