I have to discharge some kiloamps from a capacitor through an inductor by using two SCRs or thyristors in triac configuration, but I should need to be sure maximum dv/dt and di/dt current is not reached, so what of following configurations are better?
Where is energy stored in capacitor goes?
For time being, the current and the voltages of the elements with time will be same in both circuits assuming that the triac acts as an ideal switch. So i(t) and v(t) for the triac will be more or less tha same. The current i(t) will be in form of damped sine wave because the losses in the triac and the resistance of the indcutor. Here i assumed that the traiac will be kept on till the energy in the capacitor is dissipated.
Then the major difference is that the control of triac in the left circuit will be much easier than the right circuit because the the triac is connected to the low voltage side. Therefore the driver will be also grounded and at the low voltage. This makes the driver straight forward.
Best wishes
Thank you. The dv/dt would be over specifications: could damage the SCR or make it conduct only?
Is this the right method to drive both SCRs in antiparallel? Other users connect both gates together:
SCRs can be connected in antiparallel which will not damage the internal circuitry
use Triac for much easier control. I do not see why do you intend to use SCRs. Even your circuit is not shown fully in your figure.
I do not use a triac because I did not found any in the kiloamp peak range, I need a very high energy density in my reactors.
Abdelhalim, I inserted the full image without some text lines related to the libraries used and switch definition, but I can include them if you want. Did you used LTspice before?
Then the circuit you presented in the figure, i feel that it is not complete. The two SCRs must be connected in antiparallel connection. So the the anode of the left SCR must be connected to the ground??
Then the the right thyristor must be conduct in the positive half cycle and the left thyristor must conduct in the negative half cycle. Both must continue conducting till the capacitor completely discharges.
You have to build your circuit with clear operating concepts such tha you can properly control your SCRs.
Best wishes
Well, is connected to ground, the current goes from inductor to gnd through left SCR and goes from ground to the inductor through SCR at right.
In my simulations I can stop at the end of the positive half or after the negative one.
I tested also another configuration connecting both gates together but then I cannot stop at a half of the cycle.
I can not discharge all the capacitors continuously because the temperature of scrs would rise too much.
If you have an alternative diagram I could try in the simulator.
I could follow your schematic when i download it.
It is okay and it will function properly from the basic point of view. But i have only one question why do you not connect 220 ohm in series with the gate of the right transistor to make the circuit symmetrical for the the positive and negative half cycles of the damped oscillations.
Connecting the two gates together is not allowed in your circuit as the two gates must have different potentials. From the beginning it is rejected.
Could you show me the current in the circuit during the discharge process?
In summary this circuit can work well from the conceptual point of view.
Best wishes
Thank you Abdelhalim,
Do not take in account very much the discharge time, because sometimes it is modified from the real one due a problem between spice and scrs upon using 10us minimum step.
I have different configurations, in some of them there are two parallel circuits in order to avoid reaching the maximum peak current.
Another small problem with scr specs where it is said the minimum gate current but not the maximum.
Not at all Javier,
you are welcome,
Congratulations,
The wave forms are typical and shows that the circuit work properly.
I would propose that you include the self resistance of the coil into consideration by adding this resistance in series with it. This will add in more rapid discharge of the capacitor.
Please increase the simulation time appreciably to show the decay process of the current with time elapsing.
Concerning the driving gate current of the thyristor, the minimum value is given in the data sheet since this is the threshold gate current to make it on.
In fact you have to drive the SCR with gate current greater than the gate current. As the driving gate current increases , the on delay time of the SCR decreases. This is a characteristic of the SCRs.
Best wishes
- Badges
- Science topic
- Similar topics
- Biological Science
- Bioecology
- Systems Ecology
- Landscape Ecology
- Connectivity