yes, you are right , oscillator is located in modulator, in case of OFDM also its in modulator block which comes after coding and mapping i.e. serial to parallel converter. It comes before FFT, or in simpler words we can say that it is attached with sub carrier. In block diagram of OFDM system , oscillator in particular is not mentioned but frequency is written as a part of sub carrier mapping. 

In OFDM, generally the signal flow is as follows:

If the system is designed for baseband operation (such as DMT, as used in ADSL modems) then you can use a twice-as-large IFFT, constructing the input frequency-domain vector with Hermitian symmetry to  give a single output vector of real time-domain samples, which you can feed serially to a single DAC.

Here's a nice tutorial which explains it (with block diagrams!):

http://www.cdt21.com/resources/Modulation/modulation_OFDM.asp

To understand how OFDM works you must know that two modulations are performed in OFDM. First is the modulation of sub-cariers and the second is the modulation of base-band multi-carrier signal to pass-band. I believe you are interested in the first one, which is performed with IFFT (or better IDFT as IFFT is only fast algorithm to perform IDFT).

To see where the oscillator is (or better where the oscillators are, as for each sub-carrier you need an oscillator) you must observe the equation for IDFT:

x[n]= Sum(X[k] Exp(j 2 Pi k F0 n )

where F0 is base frequency F0 = 1/N, and N is the length of IDFT.

For Each k (k = 1 ... N-1)  Exp(j 2 Pi k F0 n) represent complex harmonic signal of frequency k F0, i.e., harmonic oscillator.

OFDM waveforms are found very sensitive to certain imperfections in the radio frequency (RF) electronics, such as oscillator phase noise (PN), carrier frequency offset (CFO) and IQ imbalance.

Design challenges of OFDM modulation:

i) Sensitive to frequency offset; need frequency offset correction in the receiver.

ii) Sensitive to oscillator phase noise- clean and stable oscillator required.

iii) Large peak to average ratio; amplifier back-off, reduced power efficiency.

iv) IFFT/FFT complexity; fixed point implementation to optimize latency and performance.

v) Intersymbol Interference (ISI) due to multipath; use guard interval.

You can clearly see in the block diagram (image) provided by me that at the Tx end modulation is done after DAC, but before DAC and after IFFT/FFT block we are adding Guard Interval (GI) to reduce ISI and doing Windowing by raised cosine window, to reduce the power of out-of-band subcarriers more quickly.