If you use cadence virtuoso with your PDK, you can use corners in your simulations. This corners are models variants for the components process. Unfortunately, every foundries companies have their own conventions and the corner name semantic are not obvious sometimes.

This corners are very convenient as they save you from monte carlo process sampling analysis. However, monte carlo mismatch sampling can't be bypassed.

Dear Sreekala and colleages

welcome,

The section ISO is added to some words with the meaning of equal. Here ISO- AREA means EQUAL AREA. This makes sense since if one compares two vlsi designs, one has to lay them out in the same area for fair performance comparison.

Please an example refer to the pages 247-248 in the book given in the link:https://books.google.com.eg/books?id=6_-5BQAAQBAJ&pg=PA246&lpg=PA246&dq=iso+area+in+vlsi&source=bl&ots=P21sHW0Gfs&sig=OoclT-VHffVuh_uGUXT6asAO7eE&hl=en&sa=X&ved=0ahUKEwj_0YfH7YPXAhVmCcAKHUHEC44Q6AEILDAC#v=onepage&q=iso%20area%20in%20vlsi&f=false

Best wishes

Thanking You Sir