I was wondering if modern, high-end processors' register files are double-pumped, and how many ports they can have.
It completely related to the processor's architecture. Different architectures use different techniques
i agree with Hamid. also, there are other important architectural aspects that directly impact the register file implementation. although not "modern", a suggest you to read about the superscalar Alpha 21264. this design introduces a lot of the techniques found on today desktop CPUs, such as out-of-order execution, branch prediction schemes, register renaming and a lot others. another good reading is in the link that follows:
www.cs.utah.edu/~rajeev/pubs/micro01.ps
Sergio
As stated , "pipelining" I guess should not suffer if registers are multi-port ! (stalling results). Again it depends on clock phases (0,90,180,270,360) if the unit(s) support this or these are designed for a reasonable performance (best / average/worst case) . To get independent atomic operations so that multiple instructions are processed in a clock period there is a need for bargaining ! (2-phase clock circuitry) remember that there should not be any violations of set-up time/hold time etc .
Scared to use these words - "hyper threading" use the control and general purpose registers for greater parallelism .
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