Hello,

When I mention ITO as contact or electrode for my thin film transistor. The IV graph is very poor it not in linear regime.So, using it as a contact region for gate, source and drain is good or not in silvaco , why?

Coding:

SET name="TFT_12"

###### Device Simulation: ID-VG curve ######

#

GO victorydevice simflags="-P 4"

#### Structure Specification ####

#

MESH width=180

X.MESH location=0 spacing=0.5

X.MESH location=40 spacing=0.5

Y.MESH location=0 spacing=0.001

Y.MESH location=0.02 spacing=0.001

Y.MESH location=0.12 spacing=0.01

#

# The device is composed of a 20 nm layer of IGZO deposited

# 100 nm oxide on a n++ substrate that acts as the gate.

#

REGION number=1 material=igzo y.minimum=0 y.maximum=0.02

REGION number=2 material=sio2 y.minimum=0.02 y.maximum=0.12

ELECTRODE number=1 name=gate material=ito bottom

ELECTRODE number=2 name=source material=ito y.maximum=0.0 x.minimum=0.0 x.maximum=5.0

ELECTRODE number=3 name=drain material=ito y.maximum=0.0 x.minimum=35.0 x.maximum=40.0

MODELS fermidirac print

#

# Key to the characterization of amorphous materials is the

# definition of the states within the band gap.

#

DEFECTS nta=1.55e20 ntd=1.55e20 wta=0.013 wtd=0.12 \

nga=0.0 ngd=6.5e16 egd=2.9 wgd=0.1 \

sigtae=1e-15 sigtah=1e-15 sigtde=1e-15 sigtdh=1e-15 \

siggae=1e-15 siggah=1e-15 siggde=1e-15 siggdh=1e-15 \

dfile = $'name'_VD_don.log afile = $'name'_VD_acc.log numa=128 numd=64

#### Numerical method ####

#

METHOD newton

#### ID-VG Simulation ####

#

SOLVE initial

SOLVE previous

SOLVE vdrain=0.1

# bias the gate voltage to -5V

SOLVE vgate=0 vstep=-0.1 vfinal=-5 name=gate

# sweep VG from -5V to 20V

LOG outfile = $'name'_VD_IDVG.log

SOLVE vstep=0.5 vfinal=20.0 name=gate

QUIT