Dear Dr. Waseem Raja,

I agree with Dr.Liang. Morever, one semiconductor could be unintentionally doped (with carbon, oxygen) from the growth environment so much to even compensate intentionally doped acceptors, donors. Therefore, measure the electrical properties of your semiconductor. If it is not enough n- or p-type conductive measure by SIMS, Auger, etc. the concentration of nonintentionally introduced  species.

Daniela

it's important to know in which respect you are asking. are you asking for growing the semiconductor in a system like MBE or MOCVD?

Is it wafer/ substrate body doping?  Body  doping is performed to minimize defect or maximize it shunt resistance because defect is prone to generate free carrier for shunt conductivity favor to limit its device performance. Doing can control it.

Background doping is not always intentionally done. When you grow a crystal in a furnace, the residual dopant atoms in the chamber (despite high vac) will get into the crystal. The good thing about this doping is it is quite uniform, and typically quite low. This makes junction formation by diffusion/implantation very easy. For example, if you have an n background doped epi, you just have to implant a p or p+ layer at the surface. That will readily give you a p-n junction.

Background doping can significantly affect the physical properties of a semiconductor. For example, GaN is mostly n-type even if it is nominally undoped.

Dear Dr. Waseem Raja,

I agree with Dr.Liang. Morever, one semiconductor could be unintentionally doped (with carbon, oxygen) from the growth environment so much to even compensate intentionally doped acceptors, donors. Therefore, measure the electrical properties of your semiconductor. If it is not enough n- or p-type conductive measure by SIMS, Auger, etc. the concentration of nonintentionally introduced  species.

Daniela

Yes - SIMS etc is not as sensitive as electrical measurements.  Electrical measurements are INCREDIBLY sensitive.

Background doping plays an important role in device technology, and is broadly discussed in the literature. Regarding, for example, field-effect transistors, the buffer layer (substrate) should be (ideally) isolated, i.e. non-conductive. However, such perfect isolated layers cannot be realized in practice. Dependent on the given fabrication process (e.g. LEC, HB, etc.) unintentional impurities are always introduced resulting in slight conductivity of the layer. This effect is also termed unintentionally doping. To obtain buffer layer with lower conductivity, the dominant process-induced impurities must be compensated by intentionally doping with impurities of opposite charge.

I may cite a passage from my book “Basic Properties of III-V Devices – Understanding Mysterious Trapping Phenomena”, Kassel university press, 2014, p. 438ff., concerning GaN buffer layer: "The buffer layer should be of high purity, i.e. the Fermi level must be close to the intrinsic level or midgap. However, obtaining material of such purity that the carrier concentration is at intrinsic levels (n = p = ni) is an extremely difficult technological problem. Nominally undoped GaN is n-type; the carrier density lies in the order of ≈ 1 × 1016 cm-3. In addition to the conduction between source and drain through the 2DEG, a leakage path in the GaN buffer can occur as illustrated in Figure 11.55. …To obtain minimal leakage through the buffer layer the electron density in the buffer must be minimized. This is technologically realized by pinning the Fermi level at midgap by adding deep impurities. This method of obtaining insulation material has been used in GaAs and InP material systems and is referred to as compensation (see section 10.3). Using compensation, buffer leakage is eliminated; however, compensation introduces traps in the buffer layer..."

You may find more related information in my book via GOOGLE Search function.

thanks dr. gunter for the information 

How can we reduce the background doping concentration of Si in GaN from

3 × 10^16 cm-3 to 1 × 10^16 in MOCVD?

It is required growth purification for Ga face GaN growth that minimizes background carrier concentration