Dear Joyti,

Thank you for inviting me to share in this question.

The question is very interesting and relates to the power supply voltage of a digital circuit.

The power supply of a digital circuit is limited by two main factors:

The allowed power consumption in the transistors of the circuit. It is so that the power consumption is = The dynamic and static power consumption. They are proportional to the VDD^2. So, if you target low power operation you have to operate your circuit as the lowest possible power supply.

Unfortunately, Decreasing the power supply voltage will decrease the maximum operating frequency of the circuit by increasing the propagation delay time.

So the figure of a merit of the digital circuit is the power consumption time delay product. So, If you seek highest speed of the circuit you have to operate it the highest possible power supply voltage.

Recently there is an adaptive power supply operation of the digital circuits by using power management circuits where the power supply voltage is made adaptive to the required speed of operation of the circuit or the low power operation.

Please see the attached link about this topic:

https://www.springer.com/cda/content/document/cda.../9780387764719-c2.pdf?...

Best wishes

Dear Madam,

In CMOS, in the old days, the voltage scaled more or less linearly with the feature size. This was until the voltage reached 1.2 Volt, then this scaling stopped, or, at least, became a lot slower. 1.2 volt was reached on 90 nm technology.

In this first trend, the reason for the scaling is that, because of the finer technology, a lower voltage is OK, and then this lower voltage also allows lower dissipation.

The stopping (or slow down) of this trend at 1.2 Volt was because of the sub-treshold behavior of the MOS transistors. Sub-treshold the MOS behavior is similar to bipolar. (Exponential current proportional to exp((Vgs-VT)/Vt). To get the leakage low enough, (Vgs-VT) > n*Vt, (VT: treshold voltage, Vt=kT/q; k bolzmanns constant, T absolute temperature, q charge of the electron.) This stopped the voltage scaling.

In recent years, the processes give additional options as to operating voltage and leakage.

- MOS libraries come in many flavours, some faster and leaking more, some slower and leaking less.

- The processes are released for different operating voltages. Lower voltage means slower operation, higher voltages mean faster operation.

- Note that the limit on the lowest voltage are the statistical variations on VT, the MOS treshold voltage. When the operating voltage reduces, the tolerance on the current through the gates due to VT tolerances becomes higher, eventually leading to the non-operation of the circuit. SRAM is quite sensitive to this.

Best Regards,

Henri.

thanks for valuable answer.

Abdelhalim abdelnaby Zekry

Henri Cloetens @

Dear Jyoti ji,

I think voltage variation for any parameter shows the stability of the circuit. The range of voltage should be between minimum threshold voltage of transistor and upper limit is set as per the technology you are using. Remember that your parameter values should not move drastically when voltage variation take place.