Although, CMOS transistor performs well up to 28nm node, the short channel effects become uncontrollable in CMOS transistor if scaled below 28 nm. In response to this issue, VLSI Industry replaced CMOS with FINFET and SOI transistor for 14 nm and 7nm technology node.However, as per research conducted, it is estimated that FINFET can be scaled up to 5 nm. Now, question arises what transistor technology industry might adopt to scale transistors below 5nm? I have listed several possible transistor topology below. Which one of the following transistor technology might bring about massive technological change in the near future?
1. Carbon Nano-Tube based FET (CNFET) Conference Paper Performance evaluation of CNFET-based logic gates
2. Gate All Around FET (GAAFET)
Article FinFET versus Gate-All-Around Nanowire FET: Performance, Sca...
3. Compound semiconductor such as Gallium-Arsedine (GaAs), Gallium -Indium-Arsenide (GaInAs), Indium-Arsenide (InAs) based FINFET and GAAFET.
https://compoundsemiconductor.net/article/100334/InGaAs_FinFETs_For_Future_CMOS
4. Graphene based Tetra-Hz transistors
https://ieeexplore.ieee.org/document/7412441/
5. Atomic Transistor
Article A single-atom transistor
6.Light controlled Transistor or Optical Transistor
https://www.nature.com/articles/s41598-018-23367-6
Article A Silicon Optical Transistor
7. Mermistor
https://en.wikipedia.org/wiki/Memristor
The attached discussion might help you finding answer to your question
https://www.researchgate.net/post/What_is_the_future_perspective_and_the_road_map_of_operation_frequency_of_transistor_manufacturing_technologies
Dear Mehedi
Reading the answers to the attached question link might provide some necessary information regarding this discussion.
1. https://www.researchgate.net/post/What_are_the_current_technologies_employed_in_the_fabrication_of_Transistors
2. https://www.researchgate.net/post/Can_FinFET_be_used_in_implanted_devices
FinFET, SOI FETs and GAAFETs are still FETs (called MOSFETs, although IGFET (Isolated Gate FET) or MISFET (Metal ISolator FET) would be the appropriate denomination of current technology) and CMOS just stands for Complementary MOS(FET).
Considering the difficulty to synthesize nanowires in the volume necessary for large-scale chip production, I doubt this will be a feasible technology. Although graphene is somewhat easier to deposit, I expect the proven processes for Si to persist for the nearer future. So I expect to see advances in non-planar technologies ("3D" as with the FinFET) rather than some "revolutionary" process changes.
Non-Si technologies (GaAs etc. as well as e.g. SiC and GaN) are notoriously difficult to manufacture - the reason why these technologies will be restricted to applications where the prize premium is justified by performance not available in other technologies.
Summarizing: for the nearer future we will mainly see further progress in Si technology, complemented by advances in III-V and II-VI technologies. But no process disruption for the next decade. Beyond that?
"Forecasts are difficult, especially regarding the future." (attributed to Winston Churchill, Mark Twain and others)
'Some new terminology: An “ultracomputer” means any computer whose performance (per unit power) consumption exceeds the level that could possibly be attained without using reversible computing. By definition, all future ultracomputers will thus be based on reversible computing.' ~ MPF
Dear U. Dreher ,
Thank you for the information you provided.
In response to your statement "for the nearer future we will mainly see further progress in Si technology, complemented by advances in III-V and II-VI technologies. But no process disruption for the next decade" - I would like add a query.
Do you think the chip-makers are reluctant to shift towards another possible technology and start things from scratch? Rather, they are more interested to focus on developing/upgrading currently used semiconductor based technology
The attached article might help you getting idea on future potential transistor technologies
https://www.sigarch.org/looking-ahead-beyond-cmos/
Mehedi Hasan
You have to understand that the chip makers' business is producing and selling chips: the technology necessary is of minor concern, what counts is - - - costs.
Plus: they are more or less obligated to deliver significant numbers of chips, so production yield is a major concern. And the production yield goes down every time you start a new process, eventually recovering over time.
"Tweaking" an existing technology as long as possible is always cheaper than starting completely new processes.
Even the tweaking may have significant risks: look at Intel - they failed their first attempt to implement the 7 nm process node!
Kodak did not understand that their business was not producing and selling more paper photos .... and thus we have 2020 hindsight and THE Kodak Moment ...
Kodak WAS in the "photography" business ... what could have been.
Chip makers are in the INFORMATION TECHNOLOGY BUSINESS.
Producing Si transistor chips is a side-effect ... an artifact
And now a dead-end ... see GloFo 2B$ 7nm write-off news
Review the last ITRS report ... and recent International Conference on Rebooting Computing ... ICRC 2019
Lighting business ... incandescent or LED?
Transportation business ... propeller or Jet?
IT ... dead-end transistor or UltraComputing switches?
Depending on where you are ... it's hard to change when your capital equipment is fully depreciated ... companies stop creating innovative new value and start extracting the last millicent from existing products and services ... it's a recognizable pattern. Going out of business making the last cent.
Change from creating stock/brand growth value to dividend company ...
So it goes ... for the agents of same
Buck up. Take heart. Be of good spirit!
Agents of change see the OPPORTUNITIES !
UC (pronounced You See, as in vision) ... UltraComputing !
Dear Aparna Sathya Murthy
I guess you are talking about Tesla's new Chip for Automated Driving based on AI
Yep !!! In any case they are all transistors of some kind as mentioned fabrication and foundries are not that dictate chipsets ...
I assume Tesla doesn't "make" this chip. Elon really has enough problems with the factory automation - he won't want to dig into the foundry business intricacies.
BTW: I've seen a (not so) nice comment about this chip:
"Tesla's kitchen sink approach to autonomous driving" :)
I have ridden in a Tesla and checked out the auto-drive capability it is good !!! People do not understand car to chip phenomenon
https://www.techradar.com/news/silicon-chips-are-reaching-their-limit-heres-the-future
https://www.eurekalert.org/pub_releases/2018-12/dbnl-tmt120718.php
Dear Aparna Sathya Murthy
Is the auto driving capability good enough for road conditions in South Asian Countries? (for instance India, Bangladesh, Pakistan etc.)
Well, who is to blame for not following lane discipline and rules Mr Hasan ???
Dear Aparna Sathya Murthy
You got the main issue. Anyone would encounter his/her biggest nightmare while implementing autonomous vehicles in South Asian countries. I strongly doubt whether anyone would dare to take such step of implementing autonomous vehicles considering the traffic conditions.
The attached discussion might help you finding answer to your question
https://www.researchgate.net/post/What_is_the_future_perspective_and_the_road_map_of_operation_frequency_of_transistor_manufacturing_technologies
Tesla has made an exclusive chip for its automated driving based on AI.
Please consider ... Different model of computing, SWITCH Technology, and materials for the future ...
For instance .... Asynchronous Ballistic Reversible Computing (ABRC) model of computation.
Michael P. Frank·Jul 31Today at ISEC '19, presented a talk ((link: https://cfwebprod.sandia.gov/cfdocs/CompResearch/docs/ISEC19-Frank-v2.pdf) cfwebprod.sandia.gov/cfdocs/CompRes…) and a poster ((link: https://cfwebprod.sandia.gov/cfdocs/CompResearch/docs/ISEC19-poster-21.pdf) cfwebprod.sandia.gov/cfdocs/CompRes…) on recent progress towards implementing the new Asynchronous Ballistic Reversible Computing (ABRC) model of computation in superconducting electronics.
Dear Mehedi Hasan,
That's a really interesting question that many electronic engineers often ask theirselves! But no one really knows with absolute confidence the answer, because the decision and timing to go towards a new technology over another depends on a lot of factors and basically on technical and economic factors, therefore answering this question it's more like looking into a crystal ball!
Anyway after FinFETs, there are several options in R&D. For example, IBM and Imec are exploring nanosheets, nanowires and vertical nanowires, but also TFET sounds promising with its steep sub-threshold slope. Probably these will be the alternatives in the near future for process compatibility reasons with the previous technological node.
According to IRDS 2017 report (the new ITRS) these are the possible scenarios listed in the spider chart above. For more info have a look at the original file in "beyond CMOS" section:
https://irds.ieee.org/editions/2017
In the late future probably going towards a solution with no current flow will be reasonable because of the more and more important need for very low power logic and memory in logic devices, there's a lot going on at the state of art. Take a look at Magnetic or Molecular QCA.
In future telepathy is more useful than technology research and implement an ancient technique.
Hi every body,
I think the more probable technology for near future could be tunnel field-effect transistors qubit (TFETQ), based on silicon technology.
(Broadly Speaking)
I would categorize future trends in computing as follows:
A) Improvements upon Classical Computing.
B) Improvements and Scalability of Quantum Computing.
C) Hybrid Classical/Quantum Cloud Computing.
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A) Improvements in classical computing is of course a hardware and a software problem, improvement on software is urgent as general purpose operating systems passed 50M lines of code and they need to be optimized at a high level. But also, at a low level i.e. reducing the instruction sets like ARM did, or like RISC community is doing…. etc.
Software can also be converted to be GPU accelerated, a trend that we saw significant increase over the last couple years.
It worth noting also that Intel is expected to unveil their first 10nm 3D-Stacking technology by 2020.
In terms of hardware, and at the transistor level, we can talk about: Topological and Material improvements. Major candidates could be:
· CNT transistors.
· QW-TFETs
· TMD 3D transistors
· Atomic Transistors
· Mermistors
Some of the above transistors are Si based, others Ge or III–V based.
But It is important to mentioned Perovskites, as their structure give many degrees of freedom to modulate its properties, properties like Semiconductivity, Superconductivity, Linear and non-linear optics…. etc.
This book is highly recommended: “Future Trends in Microelectronics: Journey into the Unknown”
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B) in quantum computing, for now most research rely on Adiabatic Quantum Computation (AQC) which is argued to be equivalent to “Standard Quantum Cumputing” https://arxiv.org/abs/quant-ph/0405098
Other technologies include (in terms of Quantum Bits):
· Superconducting Qbits
· Ion-Trap Qbits
· Quantum dots
· Nuclear Magnetic Resonance.
· Bose-Einstein Condensates.
· Photonics Qubits
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C) Hybrid Classical/Quantum Cloud Computing.
Well………… it’s a hybrid on the Cloud !!
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This is not to mention biological stuff.
I hope this answer brought some benefits.
What do you think!
Mehedi Hasan Boualem Djezzar
This is a good overview, thank you. But the question is which transistor technology might bring a massive technological change in the near future?
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