The best way that I know should be to derive an empirical value from the gate potential and channel charge concentration using C=Q/V at Vds= few mV. In deep inversion and accumulation you should just have the oxide capacitance Cox, meaning that the channel behaves just like a metallic electrode and its potential should be nearly the same of the one at the source end. In depletion and weak inversion regimes the lack of carriers doesn't allow the channel to behave as a metallic electrode, the potential follows in some degree the gate's one and the capacitance that you see is blocked by a series pseudo-capacitor, the quantum capacitance Cq. The gate capacitance in that regime is Cg=Cox||Cq

Thanks Giancarlo,

What you have described is the case of MOS structures. What I am asking about is the case of MSM or lateral PIN structures. Where from numerical simulation you obtained the carrier concentration and potential every where in your structure at every bias point. Is there a way, using these solutions, to evaluate the capacitance of the structure at the bias point?

If I recall, you cannot use the steady-state equilibrium drift-diffusion equations and their solutions to infer information about transient behavior such as CV. Most methods I've seen to simulate CV, C(freq) and related curves use a different technique, but I could be wrong.

I would check the references for SCAPS or AFORS-HET, both of which can simulate both steady-state and transient behaviors.

Thanks Christopher Buurma,

I do understand what you mean, usually (C = dQ/dV). What I meant is you can have the result of the simulation at a certain bias point say Vbias and also the result at Vbias+dV and/or Vbias-dV. The point here is what you consider the change in the charge dQ. Can it be considered all the charge within the device and what is its change dQ caused by the change dV?

In a quasi-equilibrium case, you can directly attribute dV to a dQ, thats just invoking Poisson's equation. However, in cases of non-equilibrium any change dV (which happens instantaneously over all space) leads to a change dQ (transiently by the charge transit time). If this motion of charge is important, then you cannot attribute one to the other. If its not important, e.g. all of the charge sloshes to where it would want to be and stays there for 3x the total dt interval, then you're in quasi-equilibrium.

3x is my rule of thumb to attempt to linearize behavior, anything worse than 3x may be missing exponential behavior (e^1 < 3).

Sorry, I hope that helps. I've not yet written a CV simulation tool, this is what I recall when I was studying it.

Thanks a lot Christopher Buurma,

Do you know of any reference work that talk about this issue? If you just remember an author or a title, I will look for it.

You're quite welcome.

There's some good papers by M Burgleman who helped write the 1D simulator SCAPS which does do transinet behavior.

You could also try S Fanash, he helped write AMPS which also does this well.

Good luck!

Thanks a lot

In my point of view, it is a simple task to calculate the gate capacitance from dQ/dV as long as you assume quasi equilibrium case. From the simulation you have, for each gate bias, the carrier concentrations along the interface, which can be integrated numerically to get the surface charge. Do that for two adjacent gate biases and find (Q2 - Q1) /( VG2 - VG1). I hope that helps

For MSM structure I hope you are able to get the small signal current characteristics, actually by integrating the small signal current alone with respect to time gives the excess charge developed across the device due to your small signal voltage, the excess charge divided by the your small signal peak to peak voltage swing gives you the capacitance.

Thanks a lot Kumar for your suggestion,