Dear respected colleague Cyril,

Thank you for mentioning me in the head of your question. It is an honor for me and i am proud that i have a colleague like you.

Now let us come to your interesting didactic question about the circuit of the bipolar R-S flip flop. The circuit of the two cross coupled inverters. it is a bisatble flip flop. When the output of one inverter is high the other output is low thanks to the positive feedback. The demo is very impressive and shows the state of transistors clearly supported by the LEDs inserted in the collector path of the two transistors.

One collector represents the bit and the other the bit bar.

If one wants to change the state of the flip flop, one can apply a pulse with sufficient duration and amplitude VCC= high to the collector of the on transistor. This positive pulse will be applied at the same time at base of the off transistor driving it on making its collector low rendering the base of the on transistor low forcing the transistor to become off. In this case the collector potential will be high reaching VCC and LED will extinguished.

Since the collector gets high and if we hold applied high voltage on it nothing will happen. That is with this mode of operation the the transistor can not be burned as it changes its state to off sate quickly with the aid of the other transistor.

If you interrupt the feed back and apply the VCC on the collector of the on

transistor, then its collector will be clamped on VCC and it will go to the active mode of operation as it has now a base current IB and the collector resistance which caused its saturation is no longer effective.

The collector current will be Ic= beta IB, which may be much larger than ICsat with Rc is effective under normal operation if the transistor is hard driven. In this case the transistor will not burn out if the power dissipation in it is smaller than the nominal power dissipation. In summary the transistor will operate in the active mode as a constant current source.

Consequently:

The transistor will be burnt only if the dissipated power in it exceeds its allowed value. In your experiment the currents are sized not to damage the transistor since this exactly what happens when you trigger the flip flop. I think you time of touch is sufficiently large . So , if the transistor is not burnt with feed back it will not be burn without feed back. This my expectation and my estimation to the experimental findings.

In the next post i will speak about the ports in the memeory

Best wishes

I was just thinking about going to bed... when I saw your wonderfully written comment in your typical style...

That is right, the circuit works as a kind of "automatic fuse" that shuts off in case of a "short connection"... thus protecting itself...

I was so excited that I woke up and decided to check it experimentally (fortunately, I was taken the breadboard at home).

I even made a movie and uploaded it to GoogleDrive on this link:

https://photos.app.goo.gl/3ycXKXdf0OujAViR2

The result is visible - despite my efforts, I could not burn the transistor. How will I explain this to my students? Maybe there is some other reason? I have a doubt... but I have to check it out in practice...

(By the way, I have sent a link to this question to my students to mentally prepare them for this shocking experiment:)

Dear Aparna,

Of course, the memory cell can be implemented by MOS transistors without the need of base resistors...

I wonder if the cell can be realized with only one FET:)

Dear Cyril,

welcome,

What about the final results of your experiment of trying to burn an on transistor in the S-RAM either with and without feedback?

In case of no feed back did you measure IC and VCE after applying the VCC rail on collector of the on transistor to verify that it is went active on after applying VCC.

If you want to burn the transistor you have to increase VCC asn at the same time increase the base current to make the power dissipated in the transistor P= IC VCE > P allowed for the transistor.

In yout present circuit, you supply your circuit with 1.5V and keep relatively small

Best wishes

Dear Cyril,

You asked a new question: I wonder if the cell can be realized with only one FET!

The dynamic DRAM cell is composed of one address MOS transistor and a storage capacitor. This is the smallest practical memory cell. Since the charges stored in the capacitor leaks out, the memory must be refreshed frequently.

We proposed new addressable SRM cell using a microthyristor as a bisable device and an addressing MOS transistor. The cell needs a pull up resistor. Please follow the link:Conference Paper Design and analysis of a new microthyristor based SRAM cell

Best wishes

Oh, Abdelhalim... if only people were so responsive and warmhearted like you... what amazing discussions would happen here!

The final results, yesterday evening, were negative - I could not burn a transistor (despite my great desire:)... but experiments will continue:)

As you logically turned your attention to the power supply, I also came to the conclusion that it was the main causer of my failures:) It is a 12V A23 small alkaline battery (widely used in remote controls). Obviously, it can not give enough current to "burn" the transistor...

Today, at the beginning of the lecture, I told my students about our discussion and projected it on the screen. I then projected to them the short movie clip, in which I unsuccessfully tried to "burn" a transistor...

It was very interesting and surprising for me that one of my students - Paschalis, managed to guess both reasons why the transistor did not want to "burn" - first, that the circuit changed its state and the transistor was cut off; second, that the battery could not provide the required current.

In the end, I promised my students to make a final attempt by supplying the circuit by a strong power source with a "stif" enough voltage...

Great Cyril!

When i compared my answer in this forum with the old corresponding one i found it is more descriptive and more precise!

Best wishes for you and your students.

Regarding the possible new question, "Can we make an SRAM cell only by one transistor?", I was wondering if it is possible to find such a type (probably FET) transistor, in which to apply some positive feedback...

But maybe this question should be preceded by the more fundamental question, "Why is the elementary SRAM cell realized with two transistors?

It would be extremely interesing for me to see your idea how to use a microthyristor as a memorizing element. It reminds me of the time when many attempts were made to use tunnel diodes as memorizing elements in computers...

Ignoring the write transistor (that will be required for more than a single bit)...

I just cannot imagine a single-transistor circuit implementing positive feedback to an extend that would allow to "hold" both states (on and off), Whether FET or BJT, this is beyond my imagination :)

Thus the answer to your "fundamental question" would be:

Because it cannot be done with a single transistor.

(Due to the "problem" described above. But maybe I'm not old enough...)

Dreher, why not?

There are such 1-transistor configurations based on the dual negative feedback. I know at least two:

• "Active diode" - a transistor whose base is connected to the collector (parallel negative feedback)
• "Current diode" - a FET with a current-sensing resistor in the source and the gate connected to the other end of the resistor (serial negative feedback)

.

Aparna:

.

Yesterday, you wrote:

.

> FETs avoid resistors that is the fun part

> No resistor , less noise , less heat ...

.

FETs are intrinsically resistive, and they

suffer from Johnson noise, just like any

other resistor. The exact value depends

on the geometry, notably the W/L ratio.

.

Of course, it is very rare today (except

perhaps in a teaching environment) to

find RS flip-flops (=SRAMs) using BJTs!

They've long been the wrong technology

for all kinds of excellent reasons. You

would have to delve back a long way in

the history of electronics to find SRAMs

using BJTs. (Yes, there was a time; but

what's the relevance to today's student?)

.

This is an extremely odd thread to find

in a research site, all things considered.

Today's IC processors use several billion

FETs (much in SRAM) so it hard to know

what to make of that concern about the

need for set/reset devices; or wonder

whether one can store a bit in a single

transistor! Anyway, today's SRAMs use

as many as eight (even more) elemental

FETs per bit The chip area consumed is

much less that one state-of-the-art BJT.

.

Far more important in determining the

number of "transistors" (they're hardly

more than tiny "regions") is the design

approach used - up until now, anyway -

for general-purpose processors. They

are invariably intended to be "Universal

Turing Machines", capable of executing

far more algorithms than will ever be

required for most purposes. But that's

another story....

.

The Lone Arranger

Dear Barrie Gilbert,

It is a conceptual circuit that only illustrates how to make a "not memorizing device" (transistor, amplifier, logic gate...) memorize. The task here is to reveal the basic idea behind the most elementary storage cell consisting of minimal number of elements (transistors).

This idea can be implemented even by electromechanical devices - the well-known relay circuit (a relay and START and STOP buttons) used to control various mashines. We even discussed what is the point of using this circuit instead of a simple electric switch (it would also be interesting for us to discuss it here).

I allowed myself to build this circuit on the whiteboard at the beginning of the lecture today... just because most of today's students do not even know what an electromagnetic relay is...

Here is a conceptual presentation:

.

Cyril:

.

There are many magnetic devices that

can be used as SRAMs, of course. The

core memories that were still in use as

late as the 1970's are an example.

.

Today, the most promising technology

is that of the memristor, which some

researchers (notably at hp) believe are

ready for use in every kind of memory

function, from CPU central memory to

archival applications. Unlike electronic

circuits using active devices, memristor

are non-volatile - which of course is an

immensely important aspect. These

elements are also extremely small and

further, they are fully compatible with

a complete, active IC as substrate, to

any number of layers.

.

Unless something goes badly wrong,

this technology will mark the end of

silicon-based memories in the coming

decade. You might start your research

by looking at this 6-minute presentation

by Stanley Williams of hp, who as led

this journey. If you browse around this

YouTube area you'll find a great deal of

other material about memristors.

.

https://www.youtube.com/watch?v=rvA5r4LtVnc

.

The Lone Arranger

Dear Barrie Gilbert,

Thanks for the so valuable info; it is extremely interesting...

I only want to clarify that this discussion is dedicated only to this not physical but "purely circuit" way of memorizing - by applying a positive feedback to an amplifying element.

Supprisingly, it is still the same - from the time of Eccles and Jordan (1918) until now...

Indeed, the "relay latch" in my comment above is implemented by an electromagnetic device - a relay, but it memorizes because of the applied positive feedback... not because of the electromagnetism inside the relay...

By the way, in 1984, I made an ordinary reed switch memorizing by the help of a physical effect - the hysteresis of the switch. A few years ago, I obtained a patent for a more sophisticated "magnetic switch".

Hundreds of alarm systems using such secret magnetic switch (Magi switch) as an ARM/DISARM element were mounted in cars and homes in 90's...

Dear Barrie Gilbert,

Can you guess how many transistors are used to build this RS latch - four, six or eight?

Regards,

Cyril

https://photos.app.goo.gl/mDM4k3HaYuDCa2DL2

My best guess? None. :)

(The box is large enough to hide a bistable electromechanical relay.)

Dreher, COLD:(

And also, it would be interesting to answer the same question about this D flip-flop:

https://photos.app.goo.gl/RRqX7bvpqKfZkTcn1

I have asked a question about another odd circuit acting as an RS latch - the sense amplifier:

https://www.researchgate.net/post/What_is_the_basic_idea_behind_the_DRAM_sense_amplifier_Can_we_think_of_it_as_of_a_negative_load?

Well, Aparna... but can we apply a positive feedback to a single FET... to make it memorize?

Why is anybody even thinking

about such old conundrums?

Why not? The bet is big: if possible, we would reduce the size of SRAM twice ... and it would look like DRAM; if not, it will at least cause us to think about things we usually take on trust:)

Perhaps, the answer is given by H&H on page 119?

.

Okay: I'm obliged to take a long walk

down "memory lane" - so to speak...

.

Who remembers the Esaki diode, a

true two-terminal device which was

invented sixty years ago by a trio of

three people at what is now Sony?

.

It was hailed back then as the "new

way of making very fast computers".

It was especially favoured for use in

memories.

.

It never did. Why not? Do you recall

the main reason why it failed to live

up to these promises?

.

The Lone Arranger

Another weird device (in addition to the Abdelhalim's microthyristor) with an "intrinsic positive feedback" (more correctly is to say, "with N-type negative resistance" or "with hysteresis")...

I have lost a lot of time in the past to figure out how these odd devices "jump" from one state to the other... and finally explained it in this Wikibooks story:

https://en.wikibooks.org/wiki/Circuit_Idea/Negative_Differential_Resistance#Bistable_mode

I remember this time of great hopes assigned to the tunnel diodes. I can guess at least for two reasons why it failed:

• It was difficult to produce it in an integrated form (as an IC)
• It was difficult to control it in an easy and conventional way

I will have to give it to students today to explore it in the laboratory on semiconductor devices with my favorite curve tracer:

https://www.researchgate.net/post/Is_the_simplest_diode_curve_tracer_a_perfect_circuit

It will be a lot of fun since the resistance is quite high:)

From the laboratory:

https://photos.app.goo.gl/PjZpgMblCRa8jmYs1

https://photos.app.goo.gl/Lw5r7ko6XNvKKUxo2

I'm old enough to have heard the term "Esaki diode", but not old enough to have learned about the "memory hype" involving tunnel diodes :)

Beyond Cyril's points, another issue might have applied:

this type of memory would have required a significant amout of current (aka power), with little chance to get the current down. Thus even if integration had been achieved, such devices would have been some type of "oven".

Right, in contrast to CMOS, tunnel diode cell will consume some (relatively constant) current...

BTW the tunnel diode investigated in the movies above, acts as a memory cell (latch)...

Unfortunately, trying to see the "devilish" part of the IV curve representing negative resistance... finally I "burned" the tunnel diode... and this put an end to my experiments...

And do you have any idea how to study the negative resistance region of the tunnel diode IV curve?

Tomorrow I will have no less interesting labs on digital circuitry, where we (students and I) will explore circuits with hysteresis (any sort of Schmitt triggers)...

I will try to convince my favorites that there is no much difference between a Schmitt trigger and an RS latch (D flip-flop)... and they can be used interchangeably...

Aparna, would you say it a little more clearly?

I have asked another "naive" question:

https://www.researchgate.net/post/Is_it_possible_to_make_an_SRAM_cell_with_only_one_transistor

I find the "wondering experience" of these colleagues

to be interesting

in spite of their lack of fruit-bearing

in the realms of latest techniques.

...

I was criticized during my career of "wondering" too much .

It is the process by which some folks produce imaginative results.

...

One of my favorite pictures

is of a young man tinkering with a TV !

.

I wonder and wander with my radio in the night sky.

Still just an apprentice,

@ Glen Ellis

You cannot wonder "too much". This wondering sometimes results in your colleagues and staff wondering - about your results :)

.

Friends of the Electron:

.

This note from the advanced program

of next year's International Solid-state

Circuits Conference (ISSCC) might be

of interest; it's about an evening panel

discussing 'Why Things Go Wrong'. It

seemed somewhat relevant to all the

spurious posts on this recent thread:

.

"Working on your first (or last) IC can

be exciting, stressful, rewarding, and

embarrassing. Whatever the lessons

learned, be assured that they were

experienced by pioneers before you.

Failures (mistakes or just bad ideas!)

can be valuable learning experiences,

but are rarely revealed.

.

"Tonight, we provide an opportunity

for recognized experts to share their

various mistakes, gaffs and failures,

and disclose the lessons learned. And

after all the panelists have confessed,

the audience can contribute their own

“learning experiences” (in less than a

minute).

.

"This collection of revelations should be

motivating: inspiring to the young and

inexperienced; and an opportunity for

gurus to be virtuous in sharing what is

a universal truth – first-time perfection

is rare!

.

"Panelists: Bram Nauta, University of

Twente, Enschede, The Netherlands;

Nicky Lu, Etron Technology, Hsinchu,

Taiwan; Shanthi Pavan, Institute of

Technology, Madras, Chennai, India;

David J. Allstot, University of California,

Berkeley; Barrie Gilbert, Analog Devices

NW Labs, Beaverton, OR; Jon Strange,

MediaTek Wireless, West Malling, UK."

.

The Lone Arranger

� ��l�

Guys,

I think, perhaps, Last Time Perfection is as Rare ...

since there will always be someone

with talent to make improvements,

... and sometimes

a real 'talent' appears in our midst

to even invent a new box for our thinking.

.

! La vida es algo bueno, viene con muchas sorpresas !

U. Dreher

Indeed, there is an occupational "chance" involved here

for one who is inclined to 'wonder' seriously,

but is perceived to be 'wandering" playfully.

...

Several times I was call-to-task by well degreed supervisors

( who had been watching too much Star Trek ) .

I had to demonstrate with math and revised projects

just what works well vs. what does not work well.

...

Our "wondering" must be well grounded in electrical theory,

which resides in the 'mother of all sciences' Physics.

And

... there must be math descriptors for the processes.

Glen Ellis

I was often considered a "one man taskforce". These "well degreed whatevers" often think that wishful thinking is enough to make something work.

But you cannot cheat Physics, Chemistry, Mathematics etc. One of my credos.

I'm rather disappointed by all this "high-tech" crap these days: looking closer you too often find clumsy, instable "solutions".

BTW: while first time (near-) perfection is rare, it is way from impossible. But this requires tedious, meticulous work - nothing most will want to do.

U. Dreher

Indeed ! ... You have a kindred spirit.

I love the many years of Star Trek

... but only for the way it "tickles" my mind,

and piques my interest in un-explored possibilities.

.

But , as I have learned, for real excitement you should sit on the floor ...

and read from among BG's many writings . ... Imagine past the "box".

.

Glen and Dreher... guys... let's get back to specific circuit ideas (sorry, but I am internally organized to write clearly and specifically)...

So, is no one curious to see what is inside my white box:)?

Of course, in the end, I will open this "magic box" in a movie that I have already shot... but it would be more interesting if you can guess:)

Aparna, there is a real memory cell inside the box - non-volatile and magnetically controlled:)

Magnetically controlled?

Not my bistable but some "normal" relay(s)?

Dreher,

It is simpler than a "normal" relay... it is only a part of such a relay... and this part is not the coil:)

Aparna,

It is in the magnetic domain since, in 1984, the parents of my wife gave to us - the young family, a new car (the famous "Lada", VAZ 2105:)... and I, as a young son-in-law:), decided to equip it with a "super-secret" and "fully invisible" alarm system invented by me - the young engineer...

Thus I invented this magic arm/diasarm switch... and called it "Magi switch":) It could be activated from the outside of the car... through a window or some plastic part...

Glorious times were these...

Aparna, do you appreciate the fact that this "magic switch" is non-consuming and non-volatile:)?

Magnet + reed switch?

Dreher, WARM:) It just remains to specify what the magnet is...

Peace upon you all respected colleagues!

Dear Cyril and colleagues

The magnetic domain is a very small permanent magnet that can be forced to change magnetic direction by an external magnetizing field and thereby it is binary in the sense it can store one bit either one or zero according its magnetic direction.

One has to spend energy to rotate the domains to flip their magnetic directions and therefore they consume energy in writing them even if it is very small. Also in reading them one has to sense their magnetic field by magnetic field sensors. The sensed voltage needs to be amplified and therefore the Reading process also consumes energy.

It dos not need energy for the storing itself as Cyril hinted.

The hard disk storage is based on such magnetic domains.

By analogy, there is also, the ferroelectric memory where the bits are permanently stored in ferroelectric materials.

Please see the link: web.eecs.umich.edu/~prabal/teaching/eecs373-f12/slides/student.../09-fram.pptx

Best wishes

Excellent examples, Abdelhalim!

I would add also the old magnetic-core memory...

Now, it is interesting to find the common idea between these magnetic cells, "magic switch", latches, SRAM cells... and why not Schmitt triggers?

I think this is the phenomenon called by the strange name "hysteresis"...

Cyril,

Long ago, I carried a mag-core bit-memory for good luck.

Abdelhalim listed some more non-power-requiring memory devices.

.

Latches (NMOS) and SRAM are toggling memory functions.

.

Schimitt Hysterisis triggering is a lagging effect.

These require a continued outside power to maintain the new state.

.

Please explain how these are a "memory" effect.

Or ... Perhaps you are expanding our perspective.

(mainly) Glen Ellis

SRAM only in theory needs energy to retain the content.

We more than once experienced SRAMs to return to the previous state after extended periods without power. (Once an SRAM returned to life with only minor "imperfections" after 6 months without power. Residual charges obviously were sufficient to retain the previous state of the individual cells.)

Dear Glen,

Irrespective of its physical construction, a binary memory cell must possess two stable states such that one can assign logic 1 to one of the states and logic zero to the other state. For example in the SRAM the logic zero is keyed in low voltage levels and the logic one is mapped on the High voltage levels. In the magnetic memory the logic one is mapped on an oriented magnetic field of the domains while logic zero is mapped on nonoriented magnetic domains in the magnetic material which means zero resultant magnetization. Another alternative is the case brought by Cyril of magnetic core memory where logic one is mapped on +M magnetization state and logic zero is mapped on -M magnetization state.

In case of DRAM the zero is mapped on zero charge stored on the capacitor of the DRAM while the one state is mapped on the full charge at the capacitor with normally a voltage of VDD.

In case of the ferroelectric memory the ferroelectric capacitor retain specific polarization charge in case of logic 1 and zero charge in case of logic zero.

From the principle point of view any bistatble device can be used as binary memory cell. The bit values can be written by changing the states of the bistable device. Also the logic values can be read by accessing the cell content. Also the cells mus be addressed by the process of selection.

It is required that the energy consumption by the memory must be as small as possible. The energy may be consumed in retaining the data written in the memory, reading and writing the contents of the memory. In addition the memory access time must be as small possible.

The last performance parameter is the size of the memory cell. It must be as small as possible.

These are performance criteria of the memories.

Best wishes

Glen, I have not heard so far that magnetic-core memories can serve as amulets... but now I know... and I can hang a reed-contact on my neck:)

To answer your question about the memory effect in Schmitt triggers, I have just asked a special question:

https://www.researchgate.net/post/Are_the_Schmitt_trigger_and_RS_latch_the_same_devices_Can_we_turn_each_of_them_into_the_other

Regarding your assertion that "these require a continued outside power to maintain the new state", I would give as an example a CMOS latch or Schmitt trigger where, in a state of rest, always one of the two transistors of each CMOS pair is turned off. What do they consume then?

Dreher, very interesting observations... Obviously, they are valid only for MOS SRAM where there is no static consumption?

Was it possible that these "residual charges" were simply in the capacitors of the power supply?

.

Nikolai:

.

Thanks for a breath of fresh air. This

little room was getting rather stuffy....

.

I wonder how many of you out there

have heard of the Signetic 25120? It

is Write-Only Memory that was very

popular at one time. See attachment.

.

The Lone Arranger

And what is the idea of this memory in one simple word?

Hi Nikolai,

Can I focus your attention to the CMOS memory cell that practically does not consume energy for retention... but still it is volatile?

@ Cyril

There was definitely no charge from the power supply. And yes - all these SRAMs were CMOS.

The "weirdest" case was an SRAM not "remembering" the previous value when the power was off for 0 - 4 minutes or longer than 10 .. 15 (we were not really interested in the exact value) minutes. In the "gap" inbetween, it perfectly remembered the previous value. Which became obvious as it resulted in some "disturbance". Reliably - every time.

(This SRAM was special insofar as it was integrated in a microcontroller - together with EPROM, thus with a process not exactly designed for the "perfect SRAM".)

Nikolai, your memory with ever circulating currents reminds me the old delay line memories...

I only wonder what will happen when reading such a circulating current... Will it continue circulating or will stop and must be restored (regenerated, refreshed... like a DRAM)?

Aparna, what is the difference between remembering "0" and "1"?

I have asked another "naive" question about an interesting difference between the RS and D flip-flop:

https://www.researchgate.net/post/Is_there_an_asynchronous_D_flip-flop

Nikolai,

All this really sounds as a "magic" - eternally circulating currents, true DC transformer, "only current" circuits... :)

Reading your last sentence about the "chicken-or-egg argument", I have the feeling that you have read some of the materials in the question below... because it sounds a bit like a teaser:)

https://www.researchgate.net/post/Are_there_causal_relationships_in_Ohms_law_If_so_which_is_the_cause_and_which_is_the_effect

Impressing! Once talked about "super stuff", let's mention also the super flywheel - an idea that was popular in the 70s to drive cars...

But maybe it's time to open the "magic white box" to see how my "non-volatile super-magnetic memory cell" is made:) ... although Dreher already has revealed the secret:

https://photos.app.goo.gl/78ItFozBrjDVgvSi2