We know in CMOS technology a 0 (LOW) is usually represented with 0V to 1/3 Vdd and 1(HiGH) is represented with 2/3 Vdd to Vdd where Vdd is the supply voltage. That means binary bits 0 and 1 has different voltage level. Now, if we want to transmit binary digits over transmission media (wired) using serial transmission then what are the possible effects of these different voltage level on power dissipation. For example, if we want to transmit "1111", "0000", "1010", "1000" then which sequence will consume more power and why? Or if they consume equal power then why the voltage level has no effect on the power consumption?
Dear Sohab,
If you want to transmit information over a physical medium, and you want this to be done efficiently, you need to use modulation and error correcting codes.
1. The theoretical amount of information that you can sent over a given physical medium, is given by Shannon's coding theorem C= B*log2(1+S/N), with
- C the channel capacity in bits per second
- B the channel bandwidth in Hz- S the average received signal power, in watt
- N the average noise or interference power in the occupied bandwidth, in watt.
That's the theory, in practice you can only approximate this, with:
1. The modulation usually used is QPSK or QAM
2. Error correctors used are Viterbi error correctors, possibly followed by Reed-Solomon second stage. Newer designs use LDPC (low density parity codes.)
Note that if C/B is lower, information can be transmitted with less power per bit. If C/B is higher, more power per bit is needed.
Practical implementation lose a few db vs theoretical. The higher the complexity, the lower the loss.
Actually the power consumption is composed of static and dynamic power consumption in general.
By advancing technologies the importance of static(specially leakage power consumption) is getting important. By the way i assume you are curious about dynamic power consumption here.
Theoretically the worst pattern over a wire which consumes more power is something like 010101010101............ or 10101010101010........... In other words in each transition from 0 to 1 and to 0 again a capacitor should be charged and again discharged which imposes a big power consumption. In one of my articles with the name of
"TSV-to-TSV inductive coupling-aware coding scheme for 3D Network-on-Chip"
the current flow of a TSV (which you can assume it as a type of wire), the concept of a current flow in a wire connected to two not gate in transistor level is illustrated. So if the current flow in a wire switches couple of times, it results in more power consumption.
Consequently, back to your question, the best data transmission in terms of power consumption is the one which has less transition between 0 and 1.
Dear Eghbal,
Thanks for your response. So, according to your answer, we can say that power consumption depends on number of switching not on how many 0's or 1's we are transmitting. That means, even we need higher voltage level to represent a 1 but it has no impact on power consumption.
Regards,
Sohag
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