Upon referring to the literature on the above issue, it is mentioned that the source pocket should be fully depleted to get less OFF current. Can any body guide me how should I make sure that the pocket in my device is fully depleted. Attached is the device structure. I am using Silvaco ATLAS TCAD tool for Simulations.
try to see hole and electron density inside the pocket, if the hole density is high compared to the electron density, then the pocket is depleted. But how do I see density?? Either you should plot the contour diagram or make a cutline along the channel in the x direction, 1nm below the si-sio2 interface.
So, hole/electron density should be checked at Vgs=0V? (I mean at off state)
Hi Md. Yasir Bashir ,
I plotted the electron/hole concentration in the pocket (shown within blue lines) and found that electron concentration is high compared to hole concentration. What is to be done to increase the hole concentration in the pocket?
Dear sir, whether the meshing is correct? If Ioff is increasing then, is it behaving like a mosfet without inferring the inbetween region?
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