How do you simulate and test this experiment? Did you modify the PDK transistor NMOS provided by the manufacturer? Many papers say that the modification is based on BSIM4. Did you connect a capacitor to the gate of NMOS to form a Flash unit? Or something else? I don’t understand. Please advise. I haven’t seen the model of floating gate transistors yet. How do you implement the Id-Vg test of NAND Flash, as well as matrix-vector multiplication and neural network operations?