The fill factor is the measure of squareness of the I-V curve. As this squareness increases the fill factor increases.

The squareness increases by:

- decreasing the reverse saturation current Is. The reverse saturation current decreases by reducing the recombination of the charge carriers. So, one has to increase the lifetime of minority carriers through out the solar cell. Also, one has to reduce the surface recombination by passivizing the interfaces which are not covered by metals. The surfaces which is covered by metal must receive a high low doping profile to reflect the minority carriers and prevent then from  reaching the Metal semiconductor interface. The key of reducing the reverse saturation current is lowering the recombination all over the cell.

This will also make the ideality factor of the solar cell diode equals 1. Increased ideality factor will reduce the fill factor. The ideality factor one is achieved by the dominating the current with the diffusion in the neutral regions of the diode on the sides of the space charge region.

- Desecrating the series resistance by increasing the doping of the emitter region and reducing the resistance of the collecting metal grid. However one can minimize them to optimum values since increasing the doping and the metal grid has adverse effect on other cell parameters.

- Increasing the shunt resistance by reducing the leakage current at the surface of the solar cell due to direct contacting the heavily doped emitter and the p-type back surface field region.

wish you success

The fill factor is the measure of squareness of the I-V curve. As this squareness increases the fill factor increases.

The squareness increases by:

- decreasing the reverse saturation current Is. The reverse saturation current decreases by reducing the recombination of the charge carriers. So, one has to increase the lifetime of minority carriers through out the solar cell. Also, one has to reduce the surface recombination by passivizing the interfaces which are not covered by metals. The surfaces which is covered by metal must receive a high low doping profile to reflect the minority carriers and prevent then from  reaching the Metal semiconductor interface. The key of reducing the reverse saturation current is lowering the recombination all over the cell.

This will also make the ideality factor of the solar cell diode equals 1. Increased ideality factor will reduce the fill factor. The ideality factor one is achieved by the dominating the current with the diffusion in the neutral regions of the diode on the sides of the space charge region.

- Desecrating the series resistance by increasing the doping of the emitter region and reducing the resistance of the collecting metal grid. However one can minimize them to optimum values since increasing the doping and the metal grid has adverse effect on other cell parameters.

- Increasing the shunt resistance by reducing the leakage current at the surface of the solar cell due to direct contacting the heavily doped emitter and the p-type back surface field region.

wish you success

The above explanation is quite useful. Thank you. But do i have a chance to make an impact over these values during silver and aluminium printing process when we turn wafers into solar cells? I mean except wafers, can printing machines, pastes and the operation improve this issue as expected?

Yes Ertac,

The metalization  process affect also the fill factor of the solar cell. It can change the series resistance as the finger dimensions and resistivity determines the resistance of the metal electrodes. Also, the contact of the metal to the semiconductor must be ohmic and of low resistance. Concerning the geometry of the finger structure at the illuminated side which is normally the cathode side of  the conventional silicon solar cells as cross section of the finger increases and its length decreases the the metalization resistance will decrease and the fill factor improves. But one has to take care of the metal shadowing as it incinerates the photocurrent desecrates.

It is so that the metal electrode resistance must be smaller that the lateral resistance of the thin emitter layer material. 

wish you success

Knowing your values for photocurrent per unit area, and the resistivity, width and thickness of your metallisation you can find a simple formula which gives an optimum width of the tracks.

Dear Ertac,

I gave an answer on a previous question about the calculations of the series and shunt resistance. The answer is given here in the context of your question:

Yes Mohmmad you can calculate the series resistance and shunt resistance provided you have the detail led construction of the solar cell. Specially the series resistance can be estimated easily from this this structure. It is so the  series resistance by definition is the sum of all resistances  in the path of the solar cell current. The resistance of the neutral regions of the solar cell diode, and the resistance of the collecting metallic bus bars. The most dominant resistance is the lateral resistance of thin emitter layer since the current must bend and flow laterally in this region.

I treated this problem in full details in my paper: a distributed SPICE model of a solar cell, which put the principles of the solar cell parameter extraction including the resistors.please see the link:https://www.researchgate.net/publication/3062547_A_distributed_SPICE-model_of_a_solar_cell

Concerning the shunt resistance, one has to have the full details of junction at the edge of the solar cell. So, it may be determined by a leakage current at the surface because the meeting of the heavily doped emitter n+-layer with the back P+ back surface field layer. This current will be a stunning current. As a leakage current it may be better determined on experimental basis and consequently Rsh.

How can I determine the series and parallel resistance values of a single junction solar cell? - ResearchGate. Available from: https://www.researchgate.net/post/How_can_I_determine_the_series_and_parallel_resistance_values_of_a_single_junction_solar_cell [accessed Apr 5, 2016].

Best wishes

Article A distributed SPICE-model of a solar cell

Mr Abdelhalim, your help is quite useful. I will check the documents you provided and consult your experience and knowledge again soon. Thank you.

Hi Ertac,

In general.Significant power losses caused by the presence of a shunt resistance, RSH, are typically due to manufacturing defects, rather than poor solar cell design. Low shunt resistance causes power losses in solar cells by providing an alternate current path for the light-generated current. Such a diversion reduces the amount of current flowing through the solar cell junction and reduces the voltage from the solar cell. The effect of a shunt resistance is particularly severe at low light levels, since there will be less light-generated current. The loss of this current to the shunt therefore has a larger impact. In addition, at lower voltages where the effective resistance of the solar cell is high, the impact of a resistance in parallel is large. Thus, The impact of the shunt resistance on the fill factor can be calculated in a manner similar to that used to find the impact of series resistance on fill factor.

Regards,  

Just as a side remark: "But also high shunt resistance (Rsh) value can boost short current (Isc) since Rsh restricts shunt currents on the cell structure." -- Be aware that this isn't accurate, because for normal ("healthy") solar cells, the short-circuit current is independent of the shunt resistance. This is so because the short-circuit current flows at short-circuit condition, where the voltage is zero -- so no current is driven through the shunt resistance. Shrot-circuit current loss only occurs if the internal series resistance is really large.