Hello Altruists,

I am using xc4vfx20-ff672 device (ML405 Evaluation Platform) for Aurora Protocol Interfacing of Xilinx Virtex -4 FPGA Board. The generated Constraints (UCF) file from example project is for xc4vfx60-ff1152 on an ML423 board. So, I had to change the commented out LOC constraints for several ports that suite my board. When, I am trying to generate the programming file, it says,

"ERROR:MapLib:30 - LOC constraint K17 on RESET is invalid: No such site on the device. To bypass this error set the environment variable 'XIL_MAP_LOCWARN'."   [My Board has Only RESET at FPGA Pin LOC K17.

I am working in Windows 7 Machine (64 bits). I tried to solve this problem following these step: 

http://www.edaboard.com/thread11331.html

But, still I have the same ERROR! Could anyone please suggest me how to obviate this Error?