I need to implement matrix inversion in hardware. The size of the matrix can be anywhere from 50 *50 to 8*8. Are ready-made standard codes available or inbuilt modules available with FPGA boards, please let me know? How feasible it is. If not FPGA can anyone suggest, another type of hardware to do so.
It is absolutely feasible. I presume you want to solve a set of linear equations, so I would go for an LU factorization scheme. These rely on row/column operations that can be readily implemented in FPGAs. I suggest familiarizing yourself with matrix factorization algorithms and then thinking about how to transfer the factorization scheme into an FPGA. Be aware of how matrix condition number will affect the number of bits you must use to preserve precision.
Since this sounds like a class project, I can't give you the solution! ;-)
George Slade Thanks! But I am a beginner in this field. So can you share any links that help me coding the same?
http://www.mathwords.com/i/inverse_of_a_matrix.htm
you find this way to calculate the inverse of a 2x2 matrix.
theres only one division and six multiplications involved.
Instead of an array, you should separate the four values.
The division and multiplications need some IP-cores, e.g. from Coregen, or you can used fixed point package.
These have latencies that must be taken in account when creating the datapath of your design.
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