Dear all,
How to calculate setup time and hold time of a memory circuit in CADENCE Spectre Simulator?. We have designed Content Addressable Memory (CAM) using 45 nm technology in CADENCE Spectre simulator. We have designed array, made layouts of it and obtained SPICE waveform by performing post layout simulations of it. Now, how we can calculate the setup and hold time of our circuit? Please help me in this regard. Thank you all in advance for your kind response.
The proper way is to do full characterization using a tool like SiliconSmart (Synopsys) or Liberate (Cadence). Otherwise, you can do a very simple sweep with spice commands and that should give you a ballpark. First, fix the clock toggle to a specific time t. Then change the data (or address) input at t, t-1, t-2, t-3, t-4, until it works. For hold, do the opposite, change t before the clock edge at t+1, t+2, t+3, until it works. Use a sweep to select the time t at which data/address toggles.
Some memories have funky behavior, don't be surprised if the numbers look too optimistic/ better than a flip-flop. Negative hold can happen, for instance.
The proper way is to do full characterization using a tool like SiliconSmart (Synopsys) or Liberate (Cadence). Otherwise, you can do a very simple sweep with spice commands and that should give you a ballpark. First, fix the clock toggle to a specific time t. Then change the data (or address) input at t, t-1, t-2, t-3, t-4, until it works. For hold, do the opposite, change t before the clock edge at t+1, t+2, t+3, until it works. Use a sweep to select the time t at which data/address toggles.
Some memories have funky behavior, don't be surprised if the numbers look too optimistic/ better than a flip-flop. Negative hold can happen, for instance.
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