How at an assembly level the parallel processing is achieved in multi core processor.
In most general-purpose cores nowadays, the process is simple:
- at boot, only one core starts executing the operating system, the other cores are idle; also, the interrupt controller is only directing events to that first core;
- upon boot, the OS kernel configures the interrupt routine table to activate the process scheduler when a timer interrupt is received;
- then the OS sets up data structures in memory with process queues for all cores;
- then the OS activates the timer interrupt for all other cores.
From this point, every time a timer interrupt is delivered, all cores execute the scheduling routine. They operate on different process queues, which makes it possible to run different processes in parallel. The shared memory is the way the schedulers on each core communicate with each other.
If one scheduler has no work to do at all it will "halt" its core. To resume execution, an inter-processor interrupt (IPI) may be delivered from another core to wake up the halted core.
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