Not sure about directly reading image (text format) into Verilog HDL!! Though I have read it once by first reading image in MATLAB, save them (relevant matrix) as .txt file. Then, you could easily read the .txt file.

If you want working sample code... I can provide you one!!

Dear Prof. Fahad, I would be very happy if you can provide a sample code for reading an text file in Verilog generated from Matlab. Thank you.

You can find the sample file attached. It contains the sample code for both to read/write data from file into Verilog testbench. If you have any question feel free to contact me.

If you want to read the file into FPGA, i.e. synthesizable, you should convert the image into .bin file and load it into the Block ROM. You can use IP core of xilinx to create block ROM according to your image size. For example, for QCIF Image (176 x 144), gray scale image, you would require Block ROM of 8-bit wide and total locations would be: 176 x 144 = 25344. Dependign upon the number of memory locations, address size will be determined 2^n >= 25344. Where n is size of address bus.

You can google for a MatLab code to convert the image into binary file. Solution proposed by respected Fahad Manzoo in not synthesizable, but will work perfectly for the simulation.

Thank you very much for answering my question. 

Hie sir, I'm Subbarayudu from vit university. I want to know about how the text file is added into xilinx (verilog test bench). If u have any sample code for it pls attach it to me

 Thank you sir.

Subba, I have attached it in this thread earlier. You can download it "sample.v" Feel free to contact me if anything is not clear..

Hi Sir, I'm Ziad from AUC. I have an image 640*480 pixels. I've changed it into binary format but I am having difficulties in creating the ROM so that I can store the image. Any help in how to store it would be great.

Hi Zaid, could you tell me which FPGA are you targeting? e.g; In case of Xilinx you need to use BRAM as a ROM/RAM and initialize it with your binary image using Xilinx BRAM Generator. If you tell me the details may be i could give you better answer.

I am using a nexys 4 FPGA and I am trying to store a 640*480, I'm having troubles in reading the binary and writing the image to the BRAM because the binary file is too big. I have tried it with a 320*240 image but I'm having troubles in reading the image because the pixels are interfering with each others due to the small image size. I attached the image below

Ziad, you made me confuse :)

You said in the previous post that you are having problem with the storage of 640 x 480 image size in to BRAM. Then you resized your image to the quarter size. How you come to know that pixels are interfacing with each other. Have you successfully stored the 320x240 image into BRAMs and now reading the stored image?

Hi Prof. Siddiqui, 

I am using Virtex-4 series Xilinx FPGA Board for image processing applications.

@Muhammad Sorry for making you confused, I have stored the 320*240 image as a coe file in the BRAM but I can't do the same with the 640*480 because it takes hours to load, the binary file of the 640*480 image is 8 Mbyte. What I meant when I was talking about the image with 320*240 is that the image is loaded from the memory then it produces the pixels beside each other until it reaches 640 and then it starts producing them in the next line. that's why the image is distorted and  looks like what I attached previously.

Hi,

     I am an undergraduate student at Indian Institute of Technology, Kharagpur. Muhammad Muzammil, how can I add the block rom in my verilog code ? I am using Vivado 2016.1 and my target device is a digilent Nexys 4 Artix board. If only you could provide with a sample code for the same or provide me with some online tutorial link then I would feel immensely benefited.

https://www.researchgate.net/profile/Muhammad_Muzammil2

Please refer to this to see the sample verilog code to read image to FPGA and process it and then writing the result to a bitmap image output: http://www.fpga4student.com/

https://fpga4student.blogspot.com/2016/11/image-processing-on-fpga-verilog.html

https://fpga4student.blogspot.com/2016/11/image-processing-on-fpga-verilog.html

http://www.fpga4student.com/2016/11/two-ways-to-load-text-file-to-fpga-or.html 

Hope this helps

http://www.fpga4student.com/2016/11/two-ways-to-load-text-file-to-fpga-or.html