Hello,
I want to find the junction thermal capacitance (J/K) based on the thermal impedance vs. time curve (we have this curve from the semiconductor specifications or IGBT module datasheet).
For instance, I attached a sample datasheet.
Thanks a lot,
Hi Omid, the electrical analogy would be a constant current source loading a C parallel to an R. That would give Vc = R * I * (1 - exp(- t / (R * C))) or with temperature T = Rth * P * (1 - exp(- t / (Rth * Cth))). Since 1 - exp(-1) = 0.632, the pulse width at Rth = 0.632 * Rthmax should be equal to Rth * Cth. Division by Rth will result in Cth. In this case, Rth * Cth = approx. 40 ms. Cth = approx. 0.16 Ws/K. This is just an approximation, of course, based on modelling by lumped elements. Hope this helps.
I really appreciate it,
This is the exact answer of my question.
I also have problem with state-space equations for one-cell Cauer network thermal modeling.
I found a page from a book, but it doesn't have any detailed explanations about that.
I attached the page below.
Thanks a lot
Hello Omid, the Cauer network is just a general way to describe the dependencies; please see p. 4 of the attached file. With only one cell, it boils down to the well known RC combination. Besides, in both equations 5.16 and 5.17 of your attached text the horizontal line in the last vector has to be deleted. Then, 5.16 gives the differential equation to be solved (we know the solution already) and 5.17 states that x = Tj and Ohm's law.
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