Hi everyone, Our project would like to use LDPC (low density parity check) code .And my mission is performing a hardware implementation of LDCP encoder and decoder on FPGA.I have already read some papers,and I also have a lot of queastions, I don't know how to start writing the verilog programs,if you have any documents ,example programs or suggests about it.
Thank you very much.
You should learn RTL design and Data Flow Graph analysis to assist your verilog coding. A good book written by Prof. Dr. Mohamed Khalil Hani with title "Introduction to RTL Design of Digital Systems with Verilog" is a very good and quick start. Last I checked, it is only USD$25.
Or, you can learn the hard and slow way by collecting and understanding verilog examples from internet. But, I am sure you will have a hard time to find material on RTL design and Data Flow Graph analysis.
Since it is parity check , it starts with unsigned stream of bits.
Where to start : just 4 lines !!! with operators for xoring
For writing verilog code for a LDPC encoder, I suggest you to write truth table first and write using behavioural or data flow modelling in verilog. Do simulation on
Modelsim or xilinx tool. Also you can try EDABACH GROUND online tool and find some already implemented design.search it there.
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