Dear research colleagues,
Among FPGAs/Raspberry pai/DSP Processors, etc. which device best suits for implementing Digital Image Processing Algorithms?
Dear Hanumantharaju,
I believe for image processing FPGA is better than other devices that you have mentioned din the question. If you want to learn about FPGA-based image processing the best book is "Design for embedded image processing on FPGAs" and if you want to read some articles here are couple of my recent published articles "Efficient hardware implementation for fingerprint image enhancement using anisotropic gaussian filter, published in IEEE Transactions on Image Processing" and "Efficient hardware implementation strategy for local normalization of fingerprint images, published in Journal of real-time image processing".
Regards
Tariq
Among these devices, of course, FPGAs but the flow are more complex respect than DSP and processor. In order to efficiently implement algorithms on FPGA you should understand Digital electronic issues as logic gates, combinational and sequential systems, propagation times, static time analysis AND SO ON.
For the mentioned devices, I think FPGA is best suited unless you are implementing some very complex computer vision algorithms where the flow and timing analysis could get very complex. Plus you would require very high memory bandwidth.
So FPGA for simple algorithms GPU's for complex CV algorithms.
Dear Dr. M. C. Hanumantharaju
Most suitable solution to your problem will be FPGA.
Hi Hanumantharaju ,
You can play with FPGA using Simulink(Xilinx system generator ) Matlab recent versions has Simulink Image processing Toolbox, with that blocks you can simply design your algorithms and port directly to FPGA using JTAG (simulink will convert the Matlab blocks into HDL) so need to write extra HDL scripts.
Dear research friends,
Thank you very much for your amazing answers to my question. From your answers, I have arrived at the conclusion that FPGAs are the right choice for implementing imaging algorithms. However, my only worry is design time and complexity with reference to spatial convolution operation. Although, I tried using separability property to realize convolution but at the cost of design time and high area consumption in terms of slices and FFs of FPGAs. Kindly, help me out by suggesting methods for fast spatial convolution operations.
I will suggest you to read this book https://www.wiley.com//legacy/wileychi/bailey/
https://books.google.com.pk/books?id=ynSYGQdsgIAC&pg=PA1851&lpg=PA1851&dq=fast+convolution+donald+g+bailey&source=bl&ots=45EJR4pteN&sig=70DEvzZJnpHXjTZcQSdd5GD6FCI&hl=en&sa=X&ved=0ahUKEwjy7faB56HcAhUMhqYKHcf9A1wQ6AEIRzAF#v=onepage&q=fast%20convolution%20donald%20g%20bailey&f=false
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