I'm using a three-phase PLL for synchronized DG units in a microgrid topology the problem is that when I enable the synchronization loop there is a significant drop in the frequency and it is different from one dg to another could you please suggest a paper or another flexible synchronization method since I use the hierarchical control method.
Thank you so much for your attention.
During startup, your PLL may experience a phase jump if the initial phase angle of the grid voltage (which is unknown) differs greatly from the initial value of the phase integrator. This phase jump causes spurious transients in the PLL output frequency, because the phase and frequency variables are estimated on a single loop in the PLL. In other words, there is a coupling between them.
To avoid large transients in the PLL output frequency during the startup, the integral gain of the PI controller of the PLL needs to be reduced as the frequency estimation dynamics are mostly controlled by this gain. Another idea is to use an adaptive mechanism to reduce the integral gain ki during the startup and restore it to original value after the phase lock. Take a look at the following article.
Ghartemani, Masoud Karimi, et al. "Problems of startup and phase jumps in PLL systems." IEEE Transactions on Power Electronics 27.4 (2011): 1830-1838.
- Badges
- Science topic
- Similar topics
- Linguistics
- Composition Studies
- Publication