I am currently working on characterization of metal oxide contacts deposited on n-type Si substrate and plan to make it a MOSCAP for C-V measurements. After going through a few literature, I found people may use different areas and thicknesses while forming front metal gate although the back contacts are usually full-area contacts. I know it might depend on the dimension of the substrate. But I wanna know if there is a design rule for the front metal gate area and if there will be any issue if we make the front contact area too large?
Dr. Janesh K. Kaushik
The limit on capacitance measurement frequency has been governed by RC time constant. It should be much less than 1/RC.
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