I need some clarity on this topic as to how we can implement jtag protection while programming/debugging FPGA circuit.
Dear Shibanti,
Because i do not know the exactly the circuit connection of the JTAG in the the FPGA kit, i will give a conceptual answer. If you want to restrict the direction of power flow to prescribed direction, then you need only to add a rectifier diode to restrict the current direction in the forward direction of the diode. Since the diode is not ideal and drops a forward voltage, then in order not to affect much the logic level high, you can use low voltage drop diodes such as the Schottky diodes.
Best wishes.
Best wishes
Hi Shibanti,
There are buffers that can do this.
Eg SN74AVC8T245
Best Regards,
Henri.
Abdelhalim abdelnaby Zekry Thank you for the answer. The JTAG circuit is the standard one with TMS, TDI, TDO and TCK signals, along with Vcc and Ground.
Henri Cloetens Thank you for the answer. I would be very grateful if you could provide me with some reference circuit with JTAG implementation?
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