Can MOSFETs be used without shorting the source to the substrate. More specifically can an enhancement type n-MOSFET be used as a switch between the source and drain with the substrate and the gate acting as separate channel formation terminals?
Remember that the gate of a MOS device is linked to the source, channel, and drain through an insulating layer, while the substrate is linked to the source, channel, and drain through a semiconductor depletion layer. These two types of links will have different behaviors with respect to the voltages across the boundaries.
Essentially, the gate will act as a MOS gate terminal, while the substrate will act as an NPN base terminal.
Thanks for the excellent clarification. By the way,by any chance, are there devices available with opposite facing insulated gate terminals so that the electric field produced can enhance carriers on one side of the substrate?
The SOI - Silicon On Insulator transistors can be acted sometimes by two inversion channels: One channel placed at interface SOI film - front oxide, acted by the Front Gate (that is usual simply named Gate in bulk MOSFETs). Other times, if the Front gate is grounded, but an active voltage is applied on the Back gate (named Substrate in bulk MOSFETs), the SOI-MOSFET can work by the inversion channel placed at the interface SOI film - Buried Oxide.
A specific SOI device that usually use this second buried channel is - pseudo-MOS transistor. It can work with a third channel - as JFET (see: C. Ravariu, A. Rusu. Experimental and theoretical proofs for the JFET work regime of the pseudo-MOS transistor, Revue roumaine des sciences techniques – série électrotechnique et énergétique, Romanian Academy Journal, vol. 56, issue 4, pp. 396-406, 2011, available at http://revue.elth.pub.ro )
To simultaneously use both interfaces, in a 3-D manner, the Fin-FET was developed.
Yes by example the vertical field given by polarisation of Gate-Substrate terminals will control the channel conduction (enhancement) and Drain and Source will act as switching terminals.
The bulk terminal can be separated from the source during the metallization process of the transistors. In this case one has two control terminals to the the MOST , the gate and the bulk. To have the same effect as the upper gate G the polarity of the VB must be the negative of VG.
Previously one used VB as a back gate bias to adjust the threshold value of the transistor before the adventure of the ion implantation.
Now there is no need for that and therefore normally the VB= VS=0