hi

You may find this website of relevance..

http://www.masterbond.com/?utm_source=sup10aoht-lo-info&utm_medium=email&utm_content=logo&utm_campaign=cinfo

Cheers

Sorry... I don't see the relevance of this web-site. My question is in regard to "acceptable" wire-bond pad damage. This web-site is a commercial adhesive advertisement. Am I missing something?

Regards,

Yes they are a commercial site but often produce white papers  and application notes....eg

http://www.masterbond.com/whitepaper/electrically-conductive-adhesives-make-right-connections

hope it helps ..

Cheers

Thank you for the link. I may find use for this in other applications involving epoxy processes - however - this question is not related to epoxy processes and I don't believe Master-Bond would produce/publish a whitepaper on wire-bonding pad probing.

Thanks again...

Hi Fred,

tell us - what does "bond wire" mean in your world?

30µm gold wire?

300µm aluminum on chip?

300µm aluminum on copper surface?

300µm copper-to-copper?

What is the ratio between what you call damage and bond foot dimeter?

Good question. I should have been more specific.

I am using 20um Au wire on a ball-wedge wirebonder (ASM) with a 60um pad pitch - so the pad size is roughly 54um. Aluminum CMOS technology pad/chip.

The probe mark is roughly 3-4um in diameter and approx 1um depth. It is completely covered by the ~50um dia Au-ball-bond.

My question is: how big is "too big" a probe mark? Or is any probe mark "too big"? I'm being told this is standard industry practice - yet no one I have asked (so far) can direct me to a standard spec or a white-paper that assesses what is an acceptable probe mark for long term reliability.

Dear Fred,

I am not an expert in that field, frankly speaking. However, isn't it possible to think of it as a geometric problem - in the first instance? If the metallization thickness is known, you could specify that the chip isn't hurt if a tip penetrates half the metallization thickness. if your probe tip is of pyramide or cone shape, you could calculate which probe mark diameter roughly corresponds to which tip penetration depth. The question is actually how deep a tip should penetrate the surface metallization of the chip.

Michael,

Thank you for your response. An interesting approach which may have some validity.

I have performed some X-sections and have seen that the depth of the probe divot can be deeper than the metal thickness and still not penetrate because of metal deformation. So I think your approach may be too conservative.

I have heard from many who say that wire bonding over probe-marks is done "all the time in industry" - however, none of those yea-sayers (so far) can point me to an industry accepted spec. or a validly run white-paper report that supports their claim. I guess I am hoping someone from that industry that does this all the time can share there studies/results.

Thanks again