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Questions related from Nikhil Babu Thottungal
I am currently working on fringe processing in meteorology. the fringes I observe are arc of concentric circles. Sometimes almost straight, sometimes curved as shown in the attachment. Could...
11 April 2017 5,719 1 View
Hi, I wanted to design a 8 point FFT in which each sample is of 32 bits. My main project was optimizing a carry skip adder and hence wanted to show the difference between the conventional one and...
06 April 2017 4,939 0 View
In xilinx ISE 14.7, after the synthesis is done, synthesis report shows the maximum combinational path delay. From this if I wanted to calculate Maximum frequency, it gives a different answer as...
31 March 2017 8,198 3 View
I wanted to take power report from cadence. I didnt include any vcd file. All I included was .v file and then took the report and the same is attached in the attachments. Is this correct way or...
31 March 2017 497 2 View
In Xpower 7.1i, when I calculated power of a 2-input AND gate, it gave me the total power as 120mW. For a 32bit carry skip adder, it is 124mW, which is totally wrong in my opinion as a 32 bit...
26 February 2017 845 2 View
