2 Questions 3 Answers 0 Followers
Questions related from Meysam Amraee
Design of CMOS circuit to create the signal Vsig. The supply voltage is Vdd and t1 is a delay which is equal to 5ns. The picture is attached.
20 August 2023 8,893 1 View
I need a comparator with an offset of less than 5 mV. It is better to be designed in 0.18 um CMOS technology and the dimensions of MOSFETs should be clear. Thanks.
02 February 2022 4,639 2 View
