Anjeet Verma

4 Questions 4 Answers 0 Followers

Questions related from Anjeet Verma

Can we merge two system generator file using schematic in xilinx ise?

I want merge two system generator file in ISE design suite 14.7 so that i can give them separate clock.

05 May 2015 2,428 1 View

How can I generate a variable frequency sinusoidal signal using xilinx system generator?

I need to generate the variable frequency sinusoidal wave for V/F control of induction motor. i am using ROM to generate sin wave but it is capable of generating sin wave of fixed frequency.

04 May 2015 9,831 9 View

Can someone tell me how to implement arctan using vhdl code in fpga?

I am working on spartan 3e fpga board.for my project i have to implement resolver that need arctan.can anybody tell me concept for doing that.

02 September 2014 108 3 View

How to implement resolver in fpga?

i am working on spartan 3e fpga board and i have to implement resolver in fpga.i have already implemented adc to get the sin and cos in digital. but now i am facing problem in implementing the...

31 August 2014 6,970 6 View