2 Questions 10 Answers 0 Followers
Questions related from Abdelaziz Lberni
Dear researcher, I want to perform post-layout simulations of some GDSII file. Is there any open source tool to simulate a GDSII file designed using CMOS 40 nm parameters? I really appreciate...
09 December 2021 7,980 3 View
Dear researcher, Is there any method to optimize parasitics in the Layout of an analog IC, for example, a 2-stage amplifier. It would be very kind of you if you could suggest something.
07 May 2021 1,135 5 View