There are two definitions about this "HCSL". One is "Host Clock Signal Level"; Another is "high-speed current steering logic".
Both of them supports PCI-Express. Which is correct? HCSL is a current-mode or voltage-mode signal? What are the advantages it have over the LVDS?
High Speed Current Steering Logic (HCSL) outputs are found in PCI express applications and Intel chipsets. HCSL is a newer differential output standard, similar to LVPECL, with a 15mA current source being derived from an open emitter or source. Being un-terminated drains, they require external 50 ohm resistors to ground.
HCSL is a high impedance output with quick switching times, in can be advantageous to use a 10 to 30 ohm series resistor to help reduce overshoot/ringing. HCSL provides the quickest switching speeds, power consumption is between LVDS and LVPECL, and phase noise performance compares well with the alternative technologies. As always it is best practice to understand a receivers input structure.
@Jaeho Pi
PCIe reference clock has some AC and DC Specifications in terms of Vcross, Vin(Min) , Vin(Max) and that specifications (especially DC) satisfied by HCSl as it has voltage swing from 0V to 0.75V
Ex DC specification: Vcross should be +250mv to +550mv
and this spec is only suitable for HCSL
- Badges
- Science topic
- Similar topics
- Social Psychology
- Attitude