Push down automata are more powerful than finite automata. A problem solved by a finite automaton can also be solved by a push down automaton. Simply ignoring the role of push down stack from push down automaton makes it finite automaton. So, i am not agree on point that push down automata can not be used for said purpose. However, push down automata may be computational expansions more than finite automata. So if you want to use push down automata to behave like finite automata, simply ignore the stack utilities.
A pushdown automata could use an unbounded amount of memory. Unless you build a large amount of memory (and a mechanism for handling "stack overflow"), you should not use pushdown automata in logic design.
Rajendra Kumar Thanks for your reply sir. I am afraid that, you aren't clear with my question. If we pushdown stack is removed from PDA then how could it be PDA. My doubt is, precisely why PDA is not used in the design of logic blocks. To be more clear, why FSM with the support of stack is not used in the design of sequential digital elements?
Being from electronics background i don't have much knowledge in TOC. So please forgive if my doubt expressed below is naive.
I would like to know that, is it licit to design a PDA with finite sized stack [depending up on the problem size that is about 2mb]? I couldnot able to find much literature in PDA implementation.
I'm not in hardware myself (I have an undergrad degree in EE, my PhD is in mathematics). But the amount of control logic needed to implement a stack in hardware would be significant. Larger programmable gate arrays might work OK for something like this, but you should really talk to someone in hardware. Besides, for hardware issues you really should think carefully about what to do about stack overflow: show that it wouldn't happen in real-world situations, or have a safe way of handling it.