How would you like to see the memory effect?

It seems to me that you make a forward scan from negative values to positive values then you reduced the applied voltage on your device down up to zero voltage. I think it is the zero voltage states that can be used to map them on the binary logic states. The logic zero is the inertial scan current value at zero voltage and the logic one corresponds to the value after the removal of the positive scan value.

The question now is how would you write zero after writing one. I think you have to destroy the one state and reach again to zero logic state may be by applying negative voltage. As a device engineer it try to interpret what i see in the figure. So, you have further to complete the I-V characteristics to see how would you return again to the logic zero state?

Best wishes

1. The answer depends on many factors. First you have to mention the a rough structure of your device,

2. Have you started the voltage scan from -4 V and also ended at -4 V?