As amplitude is in uV range, it's more prone to noise. So, in this case which is the best data acquisition board, containing LNA, ADC and processor if possible?
Dear Satyabrata,
Normally, when you have piezoelectric sensor with small output voltage and high impedance you have to build a signal conditioning circuit to amplify and may also to fitter the output signal of the sensor to make them suitable for inputting to conventional data acquisition system. The most suitable signal conditioning amplifier is the charge input type where the piezo sensor current is made to charge a feedback capacitor in an inverting op amp integrator circuit and the output of the integrator is further amplified by a second noninverting op amp amplifier stage.
So you can build your self such charge input amplifier and use any standard microcontroller + data acquisition board with the required resolution.
A second solution is to use a DAS card for the amplifier and the A/D converter and control the card by a microcontroller board. There may be other solutions.
One of the suitable DAS cards is :12-Bit, 1 MSPS, Single-Supply, Two-Chip Data Acquisition System for Piezoelectric Sensors from analog devices.
For more information please see the Link:http: //www.analog.com/static/imported-files/circuit_notes/CN0350.pdf
Wish you the best
Thank you Prof. Zekry. Your input looks quite helpful. Yes, we can go ahead with designing such circuits. But, as the signal frequency is around 2-4 MHz, I should consider a 12 bit, 10 MSPS ADC.
Your question appears to be a request for information about a commercially-available board - a complete, one-channel system. But optimized for ultrasound imaging, such is likely to be a proprietary product. If, on the other hand (as it appears from your last comment) you plan to design these channels starting with a blank sheet of paper and only moderate experience, I would suggest you have quite a lot of challenges ahead of you. Analog Devices Inc. may be able to help with low-noise front-end amplifiers for ultrasound applications. Take a look, for a start, at the part number AD8332 (which I designed). Of course, you will also find a wealth of ADCs at that web-site.
Barrie
Thank you Barrie. I have already looked for possible ICs by AD and TI. In a day, I'm gonna finalize. Once it's done, I can order a IC and can make a supporting board for that.
What is the central frequency of your ultrasound transducer? We typically try to ensure that the sampling frequency of the ADC is at least 10 times the maximum frequency of interest. I would also advise you to check the effective number of bits (ENOB) of a front end before finalising your choice.
Kind regards
Dr David Cowell
Hello Satyabrata,
One important thing! The Nyq. criterion of Fs>= 2fin is a nice ornament to decorate the books! In practice as Dr. David is saying you require much higher sampling rate fs>10fin or even higher. In that case you need to look for atleast 40MSPS chip. A 65MSPS ADC should be the one you can go for. As far as the resolution is considered, try 14-16bits so that you can get a reliable (ENOBs) of 12 or higher. However, it is not only the signal conditioning (Analog Front-End Electronics) and the ADC, but the next stage that is the processor or controller has an important role here to play in your choice of the entire - AFE-ADC chain.
Best Luck!
Thank you Dr. David for your kind suggestions. In our case, the central frequency of PZT transducer is 6-7 MHz and I've decided to go with AD 9265 with 16 bits resolution and sampling frequency of 80 MHz. I think this option looks reliable, any suggestions? Thank you Dr. Prasanna for your kind suggestions. As I stated earlier, does this option looks good?
Don't simply look at the sampling speed! Look at the supply voltage. This is a 1.8V chip with 1V - 2V input range. Again, look at the interface as I stated earlier. Either SPI or Parallel, will invite additional buffers or level shifters to make it compatible with your processor/controller unless that too you choose from the 1.8V family. I would suggest a 3.3V device/chip to be compatible with most of the 32-bit micros in the line. This will also ease of your burden on your analog front-end (op-amps. and signal conditioning).
Dr. Prasanna, in the next stage I'm going to interface output of ADC with a Virtex - 4 FPGA. So, I can interface using SPI and 1.8V is compatible for that FPGA.
- Badges
- Science topic
- Similar topics
- Organizational Psychology
- Training