I designed an LDO but the main problem is high under/overshoots even though the system is relatively working with acceptable speed. The test done is switching load using an ideal pulsating current source in virtuoso.
What are the main parameters that cause these overshoots and undershoots? Are there any papers that analysis these parameters? do you have any suggested solutions?
Thanks
Overshoot/undershoot can be reduced by a large off-chip output capacitor. If off-chip capacitor is not acceptable for the application, the overshoot/undershoot can be reduced by improving the loop bandwidth and/or by augmenting overshoot/undershoot reduction circuit. An example of the said overshoot/undershoot reduction circuit can be found in Leung's paper published in Jssc, Feb 2010.
@Mohaned Saad
My design is for capless LDO with a dominant pole at the output of error amplifier. Stability is good at low load and up to maximum load.
Hello,
this is a common issue. As already stated, the output capacitor is usually there to habdle load transient issues.
If you want to do it with no or some significantly smaller output capacitance, you have to 'speed-up' your reedback/control loop one or another way (I know of at least 4 ways to do this - all protected by patents).
Anyway, such LDOs easily run into severe EMC (EM Immunity) problems.
Which system is working with acceptable speed?
Low drop out regulators are linear regulators with small dropout voltage compared with conventional linear regulator. It is built lie the conventional one except the series transistor works as a low control able resistance with the control affected by an error voltage between a fraction of the output voltage and a fixed reference voltage. Such LDO regulators are energy saving since the lost w in the regulator is consumed in the regulating device.It is characterized by load regulation which is the change of the output voltage on a specified change of the output current. Therefore if the variations in the load causes larger change change in the output voltage then regulation may need modifications. specially the series transistor ratings.
If the average current is within the nominal load current of the device and you changed the load with high speed and the transients cursors at the rapid changes of the load then can simply suppress these transients by adding a large capacitor value at the output.
For more information please refer to the link:http://sites.ieee.org/scv-sscs/files/2010/02/LDO-IEEE_SSCS_Chapter.pdf
wish you success
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